MT9VDDT3272AY-40BK1 Micron Technology Inc, MT9VDDT3272AY-40BK1 Datasheet - Page 11

• Manufacturer Part Number: MT9VDDT3272AY-40BK1
• Description: MODULE DDR 256MB 240-DIMM
• Manufacturer: Micron Technology Inc

Specifications of MT9VDDT3272AY-40BK1

• Memory Type: DDR SDRAM
• Memory Size: 256MB
• Speed: 400MT/s
• Package / Case: 240-DIMM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 11:
PDF: 09005aef808f912d/Source: 09005aef808f8ccd
DD9C32_64x72A.fm - Rev. F 10/08 EN
Parameter/Condition
Operating one bank active-precharge current:
t
cycle; Address and control inputs changing once every 2 clock cycles
Operating one bank active-read-precharge current: BL = 4;
t
inputs changing once per clock cycle
Precharge power-down standby current: All device banks idle;
Power-down mode;
Idle standby current: CS# = HIGH; All device banks idle;
t
changing once per clock cycle; Vin = Vref for DQ, DM, and DQS
Active power-down standby current: One device bank active;
Power-down mode;
Active standby current: CS# = HIGH; CKE = HIGH; One device bank
active;
changing twice per clock cycle; Address and other control inputs
changing once per clock cycle
Operating burst read current: BL = 2; Continuous burst reads;
One device bank active; Address and control inputs changing once
per clock cycle;
Operating burst write current: BL = 2; Continuous burst writes;
One device bank active; Address and control inputs changing once
per clock cycle;
twice per clock cycle
Auto refresh current
Self refresh current: CKE ≤ 0.2V
Operating bank interleave read current: Four device bank
interleaving reads (BL = 4) with auto precharge;
t
active READ or WRITE commands
CK =
RC =
CK =
CK =
t
t
t
t
RC (MIN);
CK (MIN); DQ, DM, and DQS inputs changing once per clock
CK (MIN); CKE = HIGH; Address and other control inputs
CK (MIN); Address and control inputs change only during
t
RC =
t
RAS (MAX);
Idd Specifications and Conditions – 512MB
Values are for the MT46V64M8 DDR SDRAM only and are computed from values specified in the
512Mb (64 Meg x 8) component data sheet
t
t
CK =
CK =
t
CK =
t
t
CK =
CK =
t
t
CK (MIN); Iout = 0mA
CK (MIN); DQ, DM, and DQS inputs changing
t
CK (MIN); Iout = 0mA; Address and control
t
t
t
CK =
CK (MIN); CKE = LOW
CK (MIN); CKE = LOW
t
CK (MIN); DQ, DM, and DQS inputs
256MB, 512MB (x72, ECC, SR) 184-Pin DDR SDRAM UDIMM
t
t
t
RC =
RFC =
RFC = 7.8125µs
t
RC =
t
RC (MIN);
t
RFC (MIN)
t
RC (MIN);
11
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Symbol
Idd4W
Idd3N
Idd5A
Idd2P
Idd3P
Idd4R
Idd2F
Idd0
Idd1
Idd5
Idd6
Idd7
-40B
1395
1665
1710
1755
3105
4050
495
405
540
45
99
45
Electrical Specifications
1170
1440
1485
1575
2610
3645
-335
405
315
450
45
90
45
©2003 Micron Technology, Inc. All rights reserved.
1170
1440
1485
1395
2610
3600
-262
405
315
450
45
90
45
-26A/
-265
1035
1305
1305
1215
2520
3150
360
270
405
45
90
45
Units
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA