MT9VDDT3272AY-40BK1 Micron Technology Inc, MT9VDDT3272AY-40BK1 Datasheet - Page 10

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MT9VDDT3272AY-40BK1

Manufacturer Part Number
MT9VDDT3272AY-40BK1
Description
MODULE DDR 256MB 240-DIMM
Manufacturer
Micron Technology Inc
Datasheet

Specifications of MT9VDDT3272AY-40BK1

Memory Type
DDR SDRAM
Memory Size
256MB
Speed
400MT/s
Package / Case
240-DIMM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Table 10:
PDF: 09005aef808f912d/Source: 09005aef808f8ccd
DD9C32_64x72A.fm - Rev. F 10/08 EN
Parameter/Condition
Operating one bank active-precharge current:
t
changing once per clock cycle; Address and control inputs
changing once every 2 clock cycles
Operating one bank active-read-precharge current: BL = 4;
t
control inputs changing once per clock cycle
Precharge power-down standby current: All device banks
idle; Power-down mode;
Idle standby current: CS# = HIGH; All device banks idle;
t
changing once per clock cycle; Vin = Vref for DQ, DM, and DQS
Active power-down standby current: One device bank
active; Power-down mode;
Active standby current: CS# = HIGH; CKE = HIGH; One device
bank active;
DQS inputs changing twice per clock cycle; Address and other
control inputs changing once per clock cycle
Operating burst read current: BL = 2; Continuous burst reads;
One device bank active; Address and control inputs changing
once per clock cycle;
Operating burst write current: BL = 2; Continuous burst
writes; One device bank active; Address and control inputs
changing once per clock cycle;
DQS inputs changing twice per clock cycle
Auto refresh current
Self refresh current: CKE ≤ 0.2V
Operating bank interleave read current: Four device bank
interleaving reads (BL = 4) with auto precharge;
t
active READ or WRITE commands
RC =
RC =
CK =
CK =
t
t
t
t
RC (MIN);
RC (MIN);
CK (MIN); CKE = HIGH; Address and other control inputs
CK (MIN); Address and control inputs change only during
t
RC =
Idd Specifications and Conditions – 256MB (All other Die Revisions)
Values are for the MT46V32M8 DDR SDRAM only and are computed from values specified in the
256Mb (32 Meg x 8) component data sheet
t
t
CK =
CK =
t
RAS (MAX);
t
CK =
t
t
CK (MIN); DQ, DM, and DQS inputs
CK (MIN); Iout = 0mA; Address and
t
CK =
t
t
CK (MIN); Iout = 0mA
CK =
t
t
t
CK =
CK (MIN); CKE = LOW
CK =
t
CK (MIN); CKE = LOW
t
t
CK (MIN); DQ, DM, and
CK (MIN); DQ, DM, and
256MB, 512MB (x72, ECC, SR) 184-Pin DDR SDRAM UDIMM
t
t
RFC =
RFC = 7.8125µs
t
RC =
t
t
RC (MIN);
RFC (MIN)
10
Symbol
Idd4W
Idd3N
Idd4R
Idd5A
Idd2P
Idd2F
Idd3P
Idd0
Idd1
Idd5
Idd6
Idd7
Micron Technology, Inc., reserves the right to change products or specifications without notice.
-40B
1215
1530
1800
1755
2340
4230
540
360
630
36
54
36
-335
1125
1530
1575
1575
2295
3690
450
270
540
36
54
36
Electrical Specifications
©2003 Micron Technology, Inc. All rights reserved.
-262
1125
1440
1350
1350
2115
3150
405
225
450
36
36
54
-26A/
2115/
3150/
1080
1305
1350
1350
2205
3285
-265
225/
405
270
450
36
54
36
Units
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA

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