MT9VDDT3272AY-40BK1 Micron Technology Inc, MT9VDDT3272AY-40BK1 Datasheet
MT9VDDT3272AY-40BK1
Specifications of MT9VDDT3272AY-40BK1
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MT9VDDT3272AY-40BK1 Summary of contents
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... RCD and RP for -335 modules show 18ns to align with industry specifications; Micron Technology, Inc., reserves the right to change products or specifications without notice. 1 184-Pin UDIMM (MO-206) 1 ≤ +70°C) A ≤ +85° Contact Micron for industrial temperature module offerings ...
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... Part Number Density MT9VDDT3272AG-40B__ 256MB 256MB MT9VDDT3272AY-40B__ MT9VDDT3272AG-335__ 256MB MT9VDDT3272AY-335__ 256MB MT9VDDT3272AG-262__ 256MB 256MB MT9VDDT3272AG-26A__ 256MB MT9VDDT3272AG-265__ MT9VDDT3272AY-265__ 256MB Table 4: Part Numbers and Timing Parameters – 512MB Base device: MT46V64M8, Module 2 Part Number Density 512MB MT9VDDT6472AG-40B__ 512MB MT9VDDT6472AY-40B__ MT9VDDT6472AG-335__ 512MB MT9VDDT6472AY-335__ ...
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Pin Assignments and Descriptions Table 5: Pin Assignments 184-Pin DDR UDIMM Front Pin Symbol Pin Symbol Pin Symbol Pin Symbol 1 Vref 24 DQ17 47 2 DQ0 25 DQS2 48 3 Vss 26 Vss 49 4 DQ1 ...
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Table 6: Pin Descriptions Symbol Type Description A0–A12 Input Address inputs: Provide the row address for ACTIVE commands, and the column address and auto precharge bit (A10) for READ/WRITE commands, to select one location out of the memory array in ...
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Functional Block Diagram Figure 2: Functional Block Diagram S0# BA0, BA1 A0–A12 RAS# CAS# WE# CKE0 PDF: 09005aef808f912d/Source: 09005aef808f8ccd DD9C32_64x72A.fm - Rev. F 10/08 EN 256MB, 512MB (x72, ECC, SR) 184-Pin DDR SDRAM UDIMM DQS0 DM9 DM CS# DQS DQ0 ...
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... READs and by the memory controller during WRITEs. DQS is edge-aligned with data for READs and center-aligned with data for WRITEs. DDR SDRAM modules operate from differential clock inputs (CK and CK#); the crossing of CK going HIGH and CK# going LOW will be referred to as the positive edge of CK. ...
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Electrical Specifications Stresses greater than those listed in Table 7 may cause permanent damage to the module. This is a stress rating only, and functional operation of the module at these or any other conditions outside those indicated in each ...
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... Design Considerations Simulations Micron memory modules are designed to optimize signal integrity through carefully designed terminations, controlled board impedances, routing topologies, trace length matching, and decoupling. However, good signal integrity starts at the system level. Micron encourages designers to simulate the signal characteristics of the system’s memory bus to ensure adequate signal integrity of the entire memory system ...
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Idd Specifications Table 9: Idd Specifications and Conditions – 256MB (Die Revision K) Values are for the MT46V32M8 DDR SDRAM only and are computed from values specified in the 256Mb (32 Meg x 8) component data sheet Parameter/Condition Operating one ...
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Table 10: Idd Specifications and Conditions – 256MB (All other Die Revisions) Values are for the MT46V32M8 DDR SDRAM only and are computed from values specified in the 256Mb (32 Meg x 8) component data sheet Parameter/Condition Operating one bank ...
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Table 11: Idd Specifications and Conditions – 512MB Values are for the MT46V64M8 DDR SDRAM only and are computed from values specified in the 512Mb (64 Meg x 8) component data sheet Parameter/Condition Operating one bank active-precharge current ...
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Serial Presence-Detect Table 12: Serial Presence-Detect EEPROM DC Operating Conditions Parameter/Condition Supply voltage Input high voltage: Logic 1; All inputs Input low voltage: Logic 0; All inputs Output low voltage: Iout = 3mA Input leakage current: Vin = GND to ...
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Module Dimensions Figure 3: 184-pin DDR UDIMM 2.0 (0.079) R (4X 2.5 (0.098) D (2X) 2.3 (0.091) TYP Pin 1 2.21 (0.087) TYP 1.27 (0.05) 1.0 (0.039) TYP 2.92 (0.115) TYP Pin 184 49.53 (1.95) TYP Notes: 1. ...
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S. Federal Way, P.O. Box 6, Boise, ID 83707-0006, Tel: 208-368-3900 www.micron.com/productsupport Customer Comment Line: 800-932-4992 Micron, the M logo, and the Micron logo are trademarks of Micron Technology, Inc. All other trademarks are the property of their respective ...