IDT89TTM553BL IDT, Integrated Device Technology Inc, IDT89TTM553BL Datasheet - Page 2

• Manufacturer Part Number: IDT89TTM553BL
• Description: IC TRAFFIC MANAGER 960-FCBGA
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDT89TTM553BL

• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 89TTM553BL

IDT 89TTM553
– Priority and weighted bandwidth distribution mechanisms across groups of flows and aggregate flows.
– Schedules rates as low as 2 kbps for each flow.
– One- and two-level byte-rate FLQ scheduling: maximum and minimum rates, and strict priority and weighted fair queuing (WFQ) for each FLQ.
– AFQ scheduling with byte-rate shaping: minimum and maximum rates with VBR MBS and PCR enforcement. Excess distribution using
– Port queues: maximum rates with byte-rate scheduling.
– Four classes of service.
– Programmable service rate (minimum and excess bandwidth distribution).
– Programmable thresholds.
– Branch connections can be added and deleted during live traffic.
– Traffic management features on all multicast roots and branches.
– Four classes of service.
– Integrated AAL-5-compliant and packet-based SAR.
– Programmable service rate.
– Programmable queue thresholds.
– Use of descriptors and DMA support for maximum performance.
– 16-bit data bus transfer at up to 66 MHz.
Configurable forwarding based on classification index.
Two ports for obtaining event-based statistics.
Configurable on-chip diagnostic statistics.
Bandwidth management rate guarantee and shaping mechanisms for each flow, each aggregate flow and each port queue.
Wire-speed logical multicasting.
Multicast label generation for spatial multicast support.
Integrated wire-speed AAL-5 segmentation and reassembly (AAL-5 CPCS SAR) in the datapath.
32-bit processor interface running at up to 66 MHz with integrated AAL-5 SAR and DMA engine for data insertion and extraction.
Algorithms implemented in hardware; software intervention required for initialization and configuration only.
Error protection on all external RAM and BIST on all internal RAM.
Inter-operable with the IDT ZTM200 traffic manager.
Per-flow byte-rate shaping.
weighted fair queuing (WFQ) and PRR.
2 of 30
March 3, 2005