IDT89HPES64H16ZABR IDT, Integrated Device Technology Inc, IDT89HPES64H16ZABR Datasheet - Page 9

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IDT89HPES64H16ZABR

Manufacturer Part Number
IDT89HPES64H16ZABR
Description
IC PCI SW 64LANE 16PORT 1156BGA
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of IDT89HPES64H16ZABR

Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
89HPES64H16ZABR

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IDT 89HPES64H16 Data Sheet
P1011MERGEN
MSMBSMODE
P01MERGEN
P23MERGEN
P45MERGEN
P67MERGEN
P89MERGEN
GPIO[29]
GPIO[30]
GPIO[31]
Signal
Signal
CCLKDS
CCLKUS
Type
Type
I/O
I/O
I/O
I
I
I
I
I
I
I
I
I
Table 4 General Purpose I/O Pins (Part 4 of 4)
General Purpose I/O.
This pin can be configured as a general purpose I/O pin.
General Purpose I/O.
This pin can be configured as a general purpose I/O pin.
General Purpose I/O.
This pin can be configured as a general purpose I/O pin.
Alternate function pin name: IOEXPINTN10
Alternate function pin type: Input
Alternate function: SMBus I/O expander interrupt 10
Common Clock Downstream. When the CCLKDS pin is asserted, it indicates that a
common clock is being used between the downstream device and the downstream
port.
Common Clock Upstream. When the CCLKUS pin is asserted, it indicates that a
common clock is being used between the upstream device and the upstream port.
Master SMBus Slow Mode. The assertion of this pin indicates that the master SMBus
should operate at 100 KHz instead of 400 KHz. This value may not be overridden.
Port 0 and 1 Merge. P01MERGEN is an active low signal. It is pulled low internally via
a 251K ohm resistor.
When this pin is low, port 0 is merged with port 1 to form a single x8 port. The Serdes
lanes associated with port 1 become lanes 4 through 7 of port 0. When this pin is
high, port 0 and port 1 are not merged, and each operates as a single x4 port.
Port 2 and 3 Merge. P23MERGEN is an active low signal. It is pulled low internally via
a 251K ohm resistor.
When this pin is low, port 2 is merged with port 3 to form a single x8 port. The Serdes
lanes associated with port 3 become lanes 4 through 7 of port 2. When this pin is
high, port 2 and port 3 are not merged, and each operates as a single x4 port.
Port 4 and 5 Merge. P45MERGEN is an active low signal. It is pulled low internally via
a 251K ohm resistor.
When this pin is low, port 4 is merged with port 5 to form a single x8 port. The Serdes
lanes associated with port 5 become lanes 4 through 7 of port 4. When this pin is
high, port 4 and port 5 are not merged, and each operates as a single x4 port.
Port 6 and 7 Merge. P67MERGEN is an active low signal. It is pulled low internally via
a 251K ohm resistor.
When this pin is low, port 6 is merged with port 7 to form a single x8 port. The Serdes
lanes associated with port 7 become lanes 4 through 7 of port 6. When this pin is
high, port 6 and port 7 are not merged, and each operates as a single x4 port.
Port 8 and 9 Merge. P89MERGEN is an active low signal. It is pulled low internally via
a 251K ohm resistor.
When this pin is low, port 8 is merged with port 9 to form a single x8 port. The Serdes
lanes associated with port 9 become lanes 4 through 7 of port 8. When this pin is
high, port 8 and port 9 are not merged, and each operates as a single x4 port.
Port 10 and 11 Merge. P67MERGEN is an active low signal. It is pulled low internally
via a 251K ohm resistor.
When this pin is low, port 10 is merged with port 11 to form a single x8 port. The
Serdes lanes associated with port 11 become lanes 4 through 7 of port 10. When this
pin is high, port 10 and port 11 are not merged, and each operates as a single x4 port.
Table 5 System Pins (Part 1 of 2)
9 of 49
Name/Description
Name/Description
October 7, 2008

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