IDT72T55268L6-7BB IDT, Integrated Device Technology Inc, IDT72T55268L6-7BB Datasheet - Page 41

• Manufacturer Part Number: IDT72T55268L6-7BB
• Description: IC CTRL QUADMUX FLOW 324-BGA
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDT72T55268L6-7BB

• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 72T55268L6-7BB

NOTES:
1. OE can be toggled during this period.
2. PRS should be HIGH during a MRS.
3. RCLK(s), WCLK(s) and SCLK(s) can be free running or idle.
4. The state of these pins are latched when the master reset pulse is LOW.
5. JTAG clock should not toggle during master reset.
6. RCS and WCS can be HIGH or LOW until the first rising edge of RCLK after master reset is complete.
7. EREN wave form is identical to REN, ERCLK wave form is identical to RCLK.
IDT72T55248/72T55258/72T55268 2.5V QuadMux DDR Flow-Control Device with
Mux/Demux/Broadcast functions 8K x 40 x 4, 16K x 40 x 4 and 32K x 40 x 4
FSEL[1:0]
PAE0/1/2/3
PAF0/1/2/3
FWFT/SI
OW[1:0]
MD[1:0]
OS[1:0]
RDDR
IS[1:0]
IW[1:0]
WDDR
IOSEL
Q[39-0]
SWEN,
EF/OR
0/1/2/3
0/1/2/3
PFM
SREN
FF/IR
MRS
WEN
REN
(4)
(4)
(4)
(4)
(4)
(4)
(4)
(4)
(4)
(4)
(4)
,
,
,
t
t
t
t
t
t
t
t
t
RSS
RSS
t
RSS
RSS
RSS
RSS
RSS
RSS
RSS
RSS
t
t
t
t
t
RSF
RSF
RSF
RSF
RSF
HIGH = Synchronous PAE/PAF Timing
LOW = Asynchronous PAE/PAF Timing
HIGH = Read/Write Double Data Rate
LOW = Read/Write Single Data Rate
HIGH = FWFT Mode
LOW = IDT Standard Mode
HIGH = HSTL I/Os
LOW = LVTTL I/Os
t
RS
Figure 10 . Master Reset
If FWFT = HIGH, OR = HIGH
If FWFT = LOW, EF = LOW
If FWFT = LOW, FF = HIGH
If FWFT = HIGH, IR = LOW
41
OE = HIGH
OE = LOW
t
t
RSR
RSR
COMMERCIAL AND INDUSTRIAL
TEMPERATURE RANGES
FEBRUARY 01, 2009
6157 drw16