IDT72T6480L10BB IDT, Integrated Device Technology Inc, IDT72T6480L10BB Datasheet - Page 43

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IDT72T6480L10BB

Manufacturer Part Number
IDT72T6480L10BB
Description
IC FLOW-CTRL 48BIT 10NS 324-BGA
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of IDT72T6480L10BB

Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
72T6480L10BB
NOTES:
1. Settings: JSEL = LOW.
2. x is the required number of bits to program the PAE and PAF offset registers. See Table 12 for the numbers based on the values external configurations.
SREN
NOTES:
1. Settings: JSEL = LOW.
2. x is the required number of bits to program the PAE and PAF offset registers. See Table 12 for the numbers based on the values external configurations.
SWEN
SCLK
IDT72T6480 2.5V, SEQUENTIAL FLOW-CONTROL DEVICE
x12, x24, x48 BIT WIDE CONFIGURATION
SCLK
SDO
SI
Symbol
t
t
t
t
t
t
t
t
DH
DS
ASO
SENS
SENH
SCLK
SCLKH
SCLKL
t
Data Hold Time
Data Setup Time
Serial Output Data Access Time
Serial Enable Setup
Serial Enable Hold
Serial Clock Cycle
Serial Clock HIGH
Serial Clock LOW
SCKH
t
SCLK
Figure 29. Serial Loading of Programmable Flag Registers (IDT Standard and FWFT Modes)
t
t
SCKL
SENS
Figure 30. Reading of Programmable Flag Registers (IDT Standard and FWFT Modes)
t
BIT 0
SENS
t
DS
Parameter
t
ASO
t
SENH
t
SENH
EMPTY OFFSET
BIT 0
(LSB)
EMPTY OFFSET
BIT X
43
(x24 or x12 I/O only) (x48 I/O width only)
BIT 0
Min.
0.5
10
45
45
2
5
5
BIT X
7-5ns
Max.
20
BIT 0
Min.
FULL OFFSET
0.5
2.5
10
45
45
5
5
7-5ns
Max.
COMMERCIAL AND INDUSTRIAL
20
FULL OFFSET
TEMPERATURE RANGES
Min.
0.5
3.5
10
45
45
5
5
10ns
FEBRUARY 10, 2009
BIT X
t
t
ENH
DH
Max.
20
(MSB)
BIT X
Unit
ns
ns
ns
ns
ns
ns
ns
ns
6358 drw37
6358 drw38

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