IDT89HPES12NT3ZBBC IDT, Integrated Device Technology Inc, IDT89HPES12NT3ZBBC Datasheet - Page 14

• Manufacturer Part Number: IDT89HPES12NT3ZBBC
• Description: IC PCI SW 12LANE 3PORT 324-BGA
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDT89HPES12NT3ZBBC

• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 89HPES12NT3ZBBC

Thermal Considerations
Power-Up Sequence
PES12NT3, the power-up sequence must be as follows:
are avoided. There are no maximum time limitations in ramping to valid power levels. The power-down sequence must be in the reverse order of the
power-up sequence.
Power Consumption
Table 14.
is relevant to the thermal performance of the PES12NT3 switch.
IDT 89HPES12NT3 Data Sheet
This section describes the sequence in which various voltages must be applied to the part during power-up to ensure proper functionality. For the
1. V
2. V
3. V
When powering up, each voltage level must ramp and stabilize prior to applying the next voltage in the sequence to ensure internal latch-up issues
Typical power is measured under the following conditions: 25°C Ambient, 35% total link usage on all ports, typical voltages defined in Table 14.
Maximum power is measured under the following conditions: 70°C Ambient, 85% total link usage on all ports, maximum voltages defined in
All power measurements assume that the part is mounted on a 10 layer printed circuit board with 0 LFM airflow.
This section describes thermal considerations for the PES12NT3 (19mm
Port-A/Port-B/Port-C
Connected Lanes:
Number of
DD
DD
TT
Note: The parameter
can vary with the number of board layers, size of the board, and airflow,
θ
θ
Symbol
JA
PE — 1.5V
JA(effective)
I/O — 3.3V
Core, V
T
1/1/1
4/1/1
4/4/4
T
given above are based on a 10-layer, standard height, full length (4.3”x12.2”) PCIe add-in card.
A(max)
J(max)
θ
θ
P
JC
JB
DD
PE, V
Effective Thermal Resistance, Junction-to-Ambient
DD
(1.0V supply)
APE — 1.0V
Core (Watts)
Typ
0.52
0.56
0.65
Thermal Resistance, Junction-to-Board
Thermal Resistance, Junction-to-Case
θ
JA(eff)
Power Dissipation of the Device
Table 15 Thermal Specifications for PES12NT3, 19x19mm BCG324 Package
is not the absolute thermal resistance for the package as defined by JEDEC (JESD-51). Because resistance
Junction Temperature
Ambient Temperature
Max
0.67
0.76
0.89
Parameter
(1.0V supply)
PCIe Digital
Typ
0.27
0.47
0.68
(Watts)
Table 14 PES12NT3 Power Consumption
Max
0.36
0.58
0.81
14 of 29
(1.0V supply)
PCIe Analog
Typ
0.13
0.19
0.21
(Watts)
2
BCG324 package). The data in Table 15 below contains information that
Value
21.8
15.1
13.9
11.4
2.47
125
Max
5.1
70
0.16
0.21
0.25
θ
JA(eff)
is the effective thermal resistance. The values for effective
(1.5V supply)
PCIe Termin-
ation (Watts)
Typ
0.11
0.22
0.38
Units
Watts
o
o
o
o
o
C/W
C/W
C/W
C/W
C/W
o
o
C
C
Max
0.13
0.26
0.51
Maximum for commercial-rated products
(3.3V supply)
Typ
0.01
0.01
0.01
I/O (Watts)
Conditions
1 m/S air flow
2 m/S air flow
Zero air flow
Maximum
Maximum
Max
0.01
0.01
0.01
February 19, 2009
Total (Watts)
Typ
1.04
1.44
1.92
Max
1.33
1.81
2.47