L6756D STMicroelectronics, L6756D Datasheet - Page 21

IC CTLR 2/3/4PH BUCK 40-VFQFPN

L6756D

Manufacturer Part Number
L6756D
Description
IC CTLR 2/3/4PH BUCK 40-VFQFPN
Manufacturer
STMicroelectronics
Datasheet

Specifications of L6756D

Applications
Controller, Intel VR10, VR11, VR11.1
Voltage - Input
12V
Number Of Outputs
4
Voltage - Output
0.3 ~ 1.6 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
40-VFQFN, 40-VFQFPN
Output Voltage
3 V
Input Voltage
- 0.3 V to + 15 V
Switching Frequency
185 KHz to 215 KHz
Operating Temperature Range
- 40 C to + 150 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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L6756D
5.2
Current reading and current sharing loop
L6756D embeds a flexible, fully-differential current sense circuitry that is able to read across
inductor parasitic resistance or across a sense resistor placed in series to the inductor ele-
ment. The fully-differential current reading rejects noise and allows placing sensing element
in different locations without affecting the measurement's accuracy. The trans-conductance
ratio is issued by the external resistor R
the reading points. The current sense circuit always tracks the current information, the pin
CSx is used as a reference keeping the CSxN pin to this voltage. To correctly reproduce the
inductor current an R-C filtering network must be introduced in parallel to the sensing ele-
ment. The current that flows from the CSxN pin is then given by the following equation (See
Figure
Considering now to match the time constant between the inductor and the R-C filter applied
(Time constant mismatches cause the introduction of poles into the current reading network
causing instability. In addition, it is also important for the load transient response and to let
the system show resistive equivalent output impedance) it results:
------ -
R
R
35μA at the OC Threshold.
The current read through the CSx / CSxN pairs is converted into a current I
tional to the current delivered by each phase and the information about the average current
I
error between the read current I
that with a proper gain is used to adjust the duty cycle whose dominant value is set by the
voltage error amplifier in order to equalize the current carried by each phase.
Figure 7.
I
L
AVG
CSx-
L
G
=
resistor is tipical designed in order to have an information current I
= ΣI
=
R C
7):
DCR
------------ -
R
INFOx
G
Current reading connections
1
------------------------------------- - I ⋅
/ N is internally built into the device (N is the number of working phases). The
1
+
+
s L DCR
I
s R C
CSxN
=
------- - I
Rg
R
L
PHASEx
PHASEx
INFOx
and the reference I
=
G
I
INFOx
placed outside the chip between CSxN pin toward
AVG
is then converted into a voltage
Output voltage positioning
INFOx
INFOx
in the range of
propor-
21/36

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