ISL8103IRZ Intersil, ISL8103IRZ Datasheet - Page 9

IC CTRLR PWM BUCK 3PHASE 40-QFN

ISL8103IRZ

Manufacturer Part Number
ISL8103IRZ
Description
IC CTRLR PWM BUCK 3PHASE 40-QFN
Manufacturer
Intersil
Datasheet

Specifications of ISL8103IRZ

Pwm Type
Voltage Mode
Number Of Outputs
1
Frequency - Max
1.5MHz
Duty Cycle
66.6%
Voltage - Supply
4.75 V ~ 12.6 V
Buck
Yes
Boost
No
Flyback
No
Inverting
No
Doubler
No
Divider
No
Cuk
No
Isolated
No
Operating Temperature
-40°C ~ 85°C
Package / Case
40-VFQFN, 40-VFQFPN
Frequency-max
1.5MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PHASE1, PHASE2, and PHASE3 (Pins 29, 28, 22)
Connect these pins to the sources of the upper MOSFETs.
These pins are the return path for the upper MOSFETs’
drives.
LGATE1, LGATE2, and LGATE3 (Pins 34, 23, 17)
These pins are used to control the lower MOSFETs and are
monitored for shoot-through prevention purposes. Connect
these pins to the lower MOSFETs’ gates. Do not use
external series gate resistors as this might lead to
shoot-through.
PGOOD (Pin 35)
PGOOD is used as an indication of the end of soft-start. It is
an open-drain logic output that is low impedance until the
soft-start is completed and VOUT is equal to the VID setting.
Once in normal operation PGOOD indicates whether the
output voltage is within specified overvoltage and
undervoltage limits. If the output voltage exceeds these limits
or a reset event occurs (such as an overcurrent event),
PGOOD becomes high impedance again. The potential at
this pin should not exceed that of the potential at VCC pin by
more than a typical forward diode drop at any time.
OVP (Pin 38)
Overvoltage protection pin. This pin pulls to VCC when an
overvoltage condition is detected. Connect this pin to the
gate of an SCR or MOSFET tied across V
prevent damage to a load device.
Operation
Mulitphase Power Conversion
Modern low voltage DC/DC converter load current profiles
have changed to the point that the advantages of multiphase
power conversion are impossible to ignore. The technical
challenges associated with producing a single-phase
converter that is both cost-effective and thermally viable
have forced a change to the cost-saving approach of
mulitphase. The ISL8103 controller helps simplify
implementation by integrating vital functions and requiring
minimal output components. The “Block Diagram” on page 3
provides a top level view of mulitphase power conversion
using the ISL8103 controller.
Interleaving
The switching of each channel in a mulitphase converter is
timed to be symmetrically out-of-phase with each of the
other channels. In a 3-phase converter, each channel
switches 1/3 cycle after the previous channel and 1/3 cycle
before the following channel. As a result, the three-phase
converter has a combined ripple frequency three times
greater than the ripple frequency of any one phase. In
addition, the peak-to-peak amplitude of the combined
inductor currents is reduced in proportion to the number of
phases (Equations 1 and 2). Increased ripple frequency and
lower ripple amplitude mean that the designer can use less
9
IN
and ground to
ISL8103
per-channel inductance and lower total output capacitance
for any performance specification.
Figure 1 illustrates the multiplicative effect on output ripple
frequency. The three channel currents (I
combine to form the AC ripple current and the DC load
current. The ripple component has three times the ripple
frequency of each individual channel current. Each PWM
pulse is terminated 1/3 of a cycle after the PWM pulse of the
previous phase. The peak-to-peak current for each phase is
about 7A, and the dc components of the inductor currents
combine to feed the load.
To understand the reduction of ripple current amplitude in the
multiphase circuit, examine the equation representing an
individual channel peak-to-peak inductor current.
In Equation 1, V
voltages respectively, L is the single-channel inductor value,
and F
The output capacitors conduct the ripple component of the
inductor current. In the case of multiphase converters, the
capacitor current is the sum of the ripple currents from each
of the individual channels. Compare Equation 1 to the
expression for the peak-to-peak current after the summation
of N symmetrically phase-shifted inductor currents in
Equation 2. Peak-to-peak ripple current decreases by an
amount proportional to the number of channels. Output
voltage ripple is a function of capacitance, capacitor
equivalent series resistance (ESR), and inductor ripple
current. Reducing the inductor ripple current allows the
designer to use fewer or less costly output capacitors.
I
I
PP
C P P
,
FIGURE 1. PWM AND INDUCTOR-CURRENT WAVEFORMS
=
SW
(
--------------------------------------------------------- -
V
=
IN
PWM1, 5V/DIV
is the switching frequency.
(
------------------------------------------------------------------- -
L F
V
IN
I
V
L1
FOR 3-PHASE CONVERTER
OUT
SW
L F
+ I
I
N V
IN
L1
L2
) V
, 7A/DIV
V
and V
SW
+ I
IN
OUT
L3
OUT
PWM3, 5V/DIV
, 7A/DIV
V
OUT
) V
IN
I
OUT
L3
are the input and output
, 7A/DIV
PWM2, 5V/DIV
L1
I
, I
L2
L2
, 7A/DIV
, and I
July 21, 2008
L3
(EQ. 2)
FN9246.1
(EQ. 1)
)

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