ISL8103IRZ Intersil, ISL8103IRZ Datasheet - Page 13

IC CTRLR PWM BUCK 3PHASE 40-QFN

ISL8103IRZ

Manufacturer Part Number
ISL8103IRZ
Description
IC CTRLR PWM BUCK 3PHASE 40-QFN
Manufacturer
Intersil
Datasheet

Specifications of ISL8103IRZ

Pwm Type
Voltage Mode
Number Of Outputs
1
Frequency - Max
1.5MHz
Duty Cycle
66.6%
Voltage - Supply
4.75 V ~ 12.6 V
Buck
Yes
Boost
No
Flyback
No
Inverting
No
Doubler
No
Divider
No
Cuk
No
Isolated
No
Operating Temperature
-40°C ~ 85°C
Package / Case
40-VFQFN, 40-VFQFPN
Frequency-max
1.5MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
V DROOP s ( )
The droop voltage, V
current through the output inductors. This is accomplished
by using a continuous DCR current sensing method.
Inductor windings have a characteristic distributed
resistance or DCR (Direct Current Resistance). For
simplicity, the inductor DCR is considered as a separate
lumped quantity, as shown in Figure 7. The channel current,
I
Equation 6 shows the s-domain equivalent voltage, V
across the inductor.
The inductor DCR is important because the voltage dropped
across it is proportional to the channel current. By using a
simple R-C network and a current sense amplifier, as shown
in Figure 7, the voltage drop across all of the inductors DCRs
can be extracted. The output of the current sense amplifier,
V
currents I
If the R-C network components are selected such that the
R-C time constant matches the inductor L/DCR time
constant, then V
drops across the individual DCRs, multiplied by a gain. As
Equation 8 shows, V
total output current, I
V
L
V
DROOP
, flowing through the inductor, passes through the DCR.
DROOP
L
s ( )
=
, can be shown to be proportional to the channel
I
L1
L
=
=
, I
R
-------------------- - I
(
------------------------------------------------------------------------- -
(
s L
s R
COMP
L2
R
, and I
S
DROOP
COMP
+
DCR
-------------
DCR
s L
DROOP
OUT
DROOP
OUT
L3
)
C
, shown in Equation 7.
is equal to the sum of the voltage
+
.
COMP
1
DCR
, is created by sensing the
is therefore proportional to the
13
+
1
)
R COMP
-----------------------
R
S
(
I
L1
+
I
L2
(EQ. 6)
+
L
(EQ. 7)
(EQ. 8)
I
,
L3
) DCR
ISL8103
By simply adjusting the value of R
to any level, giving the converter the right amount of droop at
all load currents. It may also be necessary to compensate for
any changes in DCR due to temperature. These changes
cause the load line to be skewed, and cause the R-C time
constant to not match the L/DCR time constant. If this
becomes a problem a simple negative temperature
coefficient resistor network can be used in the place of
R
temperature.
Output Voltage Offset Programming
The ISL8103 allows the designer to accurately adjust the
offset voltage by connecting a resistor, R
pin to VCC or GND. When R
and VCC, the voltage across it is regulated to 1.5V. This
causes a proportional current (I
and out of the FB pin. If R
voltage across it is regulated to 0.5V, and I
FB pin and out of the OFS pin. The offset current flowing
through the resistor between VDIFF and FB will generate
the desired offset voltage which is equal to the product
(I
OFS
COMP
V
ISL8103
DROOP
x R
+
-
to compensate for the rise in DCR due to
FIGURE 7. DCR SENSING CONFIGURATION
1
PHASE1
PHASE2
). These functions are shown in Figures 8 and 9.
DROOP
IREF
ICOMP
ISUM
C
SUM
(Optional)
OFS
C
COMP
OFS
R
S
is connected to ground, the
OFS
is connected between OFS
R
R
S
S
COMP
, the load line can be set
) to flow into the OFS pin
I L2
I
L1
INDUCTOR
INDUCTOR
L1
L2
OFS
V
OFS
L
(s)
, from the OFS
DCR
DCR
-
flows into the
July 21, 2008
FN9246.1
C
I
OUT
V
OUT
OUT

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