ISL8120IRZ Intersil, ISL8120IRZ Datasheet - Page 28

• Manufacturer Part Number: ISL8120IRZ
• Description: IC CTRLR PWM 2PHASE W/DVR 32-QFN
• Manufacturer: Intersil

Specifications of ISL8120IRZ

• Pwm Type: Voltage Mode
• Number Of Outputs: 2
• Frequency - Max: 1.5MHz
• Duty Cycle: 90%
• Voltage - Supply: 3 V ~ 22 V
• Buck: Yes
• Boost: No
• Flyback: No
• Inverting: No
• Doubler: No
• Divider: No
• Cuk: No
• Isolated: No
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
• Frequency-max: 1.5MHz
• Rohs Compliant: YES
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

For multiphase implementation, one single error amplifier
should be used for the voltage loop. Therefore, all other
channels’ error amplifiers should be disabled with their
corresponding VSEN- pulled to VCC, as shown in Figure 16.
Current Share Control Loop in Multi-Module with
Independent Voltage Loop
The power module controlled by ISL8120 with its own
voltage loop can be paralleled to supply one common output
load with its integrated Master-Slave current sharing control,
as shown in “Typical Application VIII (Multiple Power
Modules in Parallel with Current Sharing Control)” on
page 11. A resistor R
VSEN1- pin and the lower resistor of the voltage sense
resistor divider for each module. With this resistor, the
correction current sourcing from VSEN1- pin will create a
voltage offset to maintain even current sharing among
modules. The recommended value for the VSEN1- resistor
R
unity gain amplifier input pin impedance compatibility. The
maximum source current from VSEN1- pin is 350µA, which
CSR
is 100Ω and it should not be large in order to keep the
GND
V
CSR
OUT
needs to be inserted between
28
FIGURE 15. SINGLE COMMUNICATION WIRE CONNECTION
ISL8120
ISL8120
ISHARE
ISHARE
COMP
COMP
GND
VCC
GND
VCC
ISL8120
3.3k
3.3k
R2
1k
R1
R2
R1
1k
Q1: MMBT3904
Q2: MMBT3904
Q3: 2N7002
10k
10k
R3
R3
is combined with R
regulation range. The generated correction voltage on R
is suggested to be within 5% of VREF (0.6V) to avoid fault
triggering of UV/OV and PGOOD during dynamic events.
There are basically two options for the configuration of the
communication wires between the modules. Each of option
has its own unique features.
One option is to synchronize all the modules where the
system has 3 analog signal communication wires (CLKOUT-
SYNC, ISHARE, EN/FF). In this option, all the modules are
synchronized and the phase shift can also be configured to
optimal to reduce the input current ripple by interleaving
effects. The connections of these three wires allows the
system to be started at the same time and achieve good
current balance in start-up without overcurrent trip. To have
different phase shift, each module has different circuitry
configuration to program the phase shift, thus to make only
one standard module is difficult.
Q1
Q1
10k
10k
R4
R4
Q2
Q2
MODULE 2
MODULE 1
CSR
Q3
Q3
to determine the current sharing
ISHARE BUS
GND
GND
ISHARE BUS
March 20, 2009
FN6641.0
CSR