ISL8120IRZ Intersil, ISL8120IRZ Datasheet - Page 26

• Manufacturer Part Number: ISL8120IRZ
• Description: IC CTRLR PWM 2PHASE W/DVR 32-QFN
• Manufacturer: Intersil

Specifications of ISL8120IRZ

• Pwm Type: Voltage Mode
• Number Of Outputs: 2
• Frequency - Max: 1.5MHz
• Duty Cycle: 90%
• Voltage - Supply: 3 V ~ 22 V
• Buck: Yes
• Boost: No
• Flyback: No
• Inverting: No
• Doubler: No
• Divider: No
• Cuk: No
• Isolated: No
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
• Frequency-max: 1.5MHz
• Rohs Compliant: YES
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Current Loop
When the ISL8120 operates in 2-phase mode, the current
control loop keeps the channel’s current in balance. After
175ns blanking period with respect to the falling edge of the
PWM pulse of each channel, the voltage developed across
the DCR of the inductor, r
or a precision resistor, is filtered and sampled for 175ns. The
current (I
provides feedback proportional to the average output current
of each channel.
For DCR sensing, the sampling current ICS can be derived
from Equation 2:
ICS
VSEN2+
R
ISHARE
VSEN2-
ISET
ISET
=
⎛
⎜
⎝
---------------------------------------------------------------------------------------------------------------- -
CS1
IL
+
VCC
/I
V
--------------- -
I
AVG_CS
CS2
OUT
700mV
L
ISEN1B
R
VOUT
ISEN1
) is scaled by the R
I
AVG_CS
•
⎛
⎝
+15µA
--------------- - t
2F
E/A
1 D
CURRENT
–
RISEN
SW
BLOCK
FIGURE 13. SIMPLIFIED CURRENT SAMPLING AND OVERCURRENT PROTECTION
SHARE
DS(ON)
+15µA
IOUT1
–
C
L1
26
V
MIN_OFF
ISHARE
PWM CONTROL
1.2V
CHANNEL 1
of the low-side MOSFETs,
ISEN1A
BLOCK
DCR1
DCR SENSING
ISEN
R
⎞
⎠
COMP
⎞
⎟
⎠
AVG_OC
•
PHASE1
DCR
resistor and
DCR1
AMP
I
CSH_ERR
7 CYCLES
CORRECTION
DELAY
SOFT-START &
-
CHANNEL 1
VOUT
FAULT LOGIC
R
CURRENT
CHANNEL 1
(EQ. 2)
BLOCK
ISEN1
ISEN1B
I
CS1
-
I
ISL8120
AVG_CS
OC1
COMP
IOUT1
L1
+
I
ISEN1A
TRIP
r
DCR1
where IL is the inductor DC current, DCR is its DC
resistance, and t
For low-side MOSFET r
derived from Equation 3:
In multiphase mode (VSEN2- pulled high), the scaled output
currents from both active channels are combined to create
an average current reference (IAVG) which represents
average current of both channel outputs as calculated in
Equation 4.
DS(ON)
IAVG
=108µA
ICS
=
SENSING
=
PHASE1
+
I
⎛
⎜
⎝
------------------------------------------------------------------------------------------------------------------------- -
TRIP
ICS1
-----------------------------------
IL
∑
∑
+
2
=108μA
I
V
--------------- -
AVG
I
I
I
AVG
AVG_CS
CSH_ERR
+
2
OUT
L
+
ICS2
MIN_OFF
PHASE2
= (I
OC2
COMP
•
CS1
I
⎛
⎝
CS2
= I
--------------- - t
2F
1 D
= (V
AVG
+
–
-
-
+ I
DS(ON)
SW
ISARE
RISEN
CS2
is 350ns.
or I
–
DCR2
CORRECTION
AMP
) / 2
CS1
CHANNEL 2
MIN_OFF
CURRENT
- V
BLOCK
ISEN2A
sensing, the ICS can be
7 CYCLES
ISET
DELAY
DCR2
R
)/G
⎞
⎠
⎞
⎟
⎠
CS
IOUT2
•
r
ISEN2B
DS ON
L2
SOFT-START &
PWM CONTROL
C
FAULT LOGIC
CHANNEL 2
(
CHANNEL 2
BLOCK
)
March 20, 2009
R
ISEN2
VOUT
FN6641.0
(EQ. 3)
(EQ. 4)