ADT7463ARQZ ON Semiconductor, ADT7463ARQZ Datasheet - Page 38

• Manufacturer Part Number: ADT7463ARQZ
• Description: IC REMOTE THERMAL CTRLR 24-QSOP
• Manufacturer: ON Semiconductor
• Series: dBCool®r

Specifications of ADT7463ARQZ

• Function: Fan Control, Temp Monitor
• Topology: ADC, Comparator, Fan Speed Counter, Multiplexer, Register Bank
• Sensor Type: External & Internal
• Sensing Temperature: -40°C ~ 120°C, External Sensor
• Output Type: SMBus™
• Output Alarm: No
• Output Fan: Yes
• Voltage - Supply: 3 V ~ 5.5 V
• Operating Temperature: -40°C ~ 120°C
• Mounting Type: Surface Mount
• Package / Case: 24-QSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADT7463
Bit
<0>
<1>
<2>
<3>
<4>
<5>
<6>
<7>
Bit
<0>
<1>
<2>
<3>
<4>
<5>
<6>
<7>
Name
Name
STRT
LOCK
RDY
FSPD
V � I
FSPDIS
TODIS
V
2.5V
V
V
5V
R1T
LT
R2T
OOL
CC
CCP
CC
Table XIII. Register 0x41 – Interrupt Status Register 1 (Power-On Default = 0x00)
Table XII. Register 0x40 – Configuration Register 1 (Power-On Default = 0x00)
R/W
Read/Write
Write Once
Read-Only
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
R/W
Read-Only
Read-Only
Read-Only
Read-Only
Read-Only
Read-Only
Read-Only
Read-Only
Logic 1 enables monitoring and PWM control outputs based on the limit settings pro-
Logic 1 locks all limit values to their current settings. Once this bit is set, all lockable
This bit gets set to 1 by the ADT7463 to indicate that the device is fully powered-up
When set to 1, this runs all fans at full speed. Power-on default = 0. This bit does not get
BIOS should set this bit to a 1 when the ADT7463 is configured to measure current
Logic 1 disables fan spin-up for two TACH pulses. Instead, the PWM outputs go high
When this bit is set to 1, the SMBus timeout feature is disabled. This allows the
When this bit is set to 1, the ADT7463 rescales its V
A one indicates the 2.5 V high or low limit has been exceeded. This bit gets cleared on
A one indicates the V
A one indicates the V
A one indicates the 5 V high or low limit has been exceeded. This bit gets cleared on a
A one indicates the Remote 1 Low or High temp limit has been exceeded. This bit gets
A one indicates the Local Low or High temp limit has been exceeded. This bit gets
A one indicates the Remote 2 Low or High temp limit has been exceeded. This bit gets
A one indicates that an out-of-limit event has been latched in Status Register 2. This
Description
grammed. Logic 0 disables monitoring and PWM control based on the default power-up
limit settings. Note that the limit values programmed are preserved even if a Logic 0 is
written to this bit and the default settings are enabled. This bit becomes read-only and
cannot be changed once Bit 1 (LOCK bit) has been written. All limit registers should be
programmed by BIOS before setting this bit to 1. (Lockable.)
registers become read-only and cannot be modified until the ADT7463 is powered down
and powered up again. This prevents rogue programs such as viruses from modifying
critical system limit settings. (Lockable.)
and ready to begin systems monitoring.
locked at any time.
from an ADI ADOPT
allows monitoring software to display CPU watts usage. (Lockable.)
for the entire fan spin-up timeout selected.
ADT7463 to be used with SMBus controllers that cannot handle SMBus
timeouts. (Lockable.)
this bit is 0, the ADT7463 measures V
Description
a read of the status register only if the error condition has subsided.
a read of the status register only if the error condition has subsided.
read of the status register only if the error condition has subsided.
read of the status register only if the error condition has subsided.
cleared on a read of the status register only if the error condition has subsided.
cleared on a read of the status register only if the error condition has subsided.
cleared on a read of the status register only if the error condition has subsided.
bit is a logical OR of all status bits in Status Register 2. Software can test this bit in
isolation to determine whether any of the voltage, temperature, or fan speed readings
represented by Status Register 2 are out-of-limit. This saves the need to read Status
Register 2 every interrupt or polling cycle.
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CCP
CC
TM
high or low limit has been exceeded. This bit gets cleared on a
high or low limit has been exceeded. This bit gets cleared on
VRM controller and measure the CPU’s core voltage. This
CC
as a 3.3 V supply. (Lockable.)
CC
pin to measure a 5 V supply. If
REV. C