ADT7473ARQZ-1R7 ON Semiconductor, ADT7473ARQZ-1R7 Datasheet - Page 59

• Manufacturer Part Number: ADT7473ARQZ-1R7
• Description: IC THERM MON FAN CTLR 16-QSOP
• Manufacturer: ON Semiconductor
• Series: dBCool®r

Specifications of ADT7473ARQZ-1R7

• Function: Fan Control, Temp Monitor
• Topology: ADC, Comparator, Fan Speed Counter, Multiplexer, Register Bank
• Sensor Type: External & Internal
• Sensing Temperature: -40°C ~ 125°C, External Sensor
• Output Type: SMBus™
• Output Alarm: No
• Output Fan: Yes
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 16-QSOP
• Full Temp Accuracy: +/- 0.5 C
• Digital Output - Bus Interface: Serial (3-Wire, 4-Wire)
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 23. Register 0x37 — Dynamic T
Bit No.
1. This register becomes read−only when the Configuration Register 1 lock bit is set to 1. Any subsequent attempts to write to this register fail.
[2:0]
[5:3]
[7:6]
Mnemonic
CYR1
CYR2
CYL
R/W
R/W
R/W
R/W
Bits
Bits
Bits
3−bit remote 1 cycle value. These three bits define the delay time between making
subsequent T
number of monitoring cycles. The system has associated thermal time constants that need to
be found to optimize the response of fans and the control loop.
000
001
010
011
100
101
110
111
3−bit local temperature cycle value. These three bits define the delay time between making
subsequent T
of number of monitoring cycles. The system has associated thermal time constants that need
to be found to optimize the response of fans and the control loop.
000
001
010
011
100
101
110
111
2 LSBs of 3−bit remote 2 cycle value. The MSB of the 3−bit code resides in Dynamic T
Control Register 1 (Register 0x36). These three bits define the delay time between making
subsequent T
number of monitoring cycles. The system has associated thermal time constants that need to
be found to optimize the response of fans and the control loop.
000
001
010
011
100
101
110
111
MIN
Control Register 2 (Power−On Default = 0x00)
Decrease Cycle
Decrease Cycle
Decrease Cycle
8 cycles (1 sec)
16 cycles (2 sec)
32 cycles (4 sec)
64 cycles (8 sec)
128 cycles (16 sec)
256 cycles (32 sec)
512 cycles (64 sec)
1024 cycles (128 sec)
8 cycles (1 sec)
16 cycles (2 sec)
32 cycles (4 sec)
64 cycles (8 sec)
128 cycles (16 sec)
256 cycles (32 sec)
512 cycles (64 sec)
1024 cycles (128 sec)
8 cycles (1 sec)
16 cycles (2 sec)
32 cycles (4 sec)
64 cycles (8 sec)
128 cycles (16 sec)
256 cycles (32 sec)
512 cycles (64 sec)
1024 cycles (128 sec)
MIN
MIN
MIN
http://onsemi.com
adjustments in the control loop for the Remote 1 channel, in terms of
adjustments in the control loop for the local temperature channel, in terms
adjustments in the control loop for the Remote 2 channel, in terms of
59
Description
Increase Cycle
Increase Cycle
Increase Cycle
16 cycles (2 sec)
32 cycles (4 sec)
64 cycles (8 sec)
128 cycles (16 sec)
256 cycles (32 sec)
512 cycles (64 sec)
1024 cycles (128 sec)
2048 cycles (256 sec)
16 cycles (2 sec)
32 cycles (4 sec)
64 cycles (8 sec)
128 cycles (16 sec)
256 cycles (32 sec)
512 cycles (64 sec)
1024 cycles (128 sec)
2048 cycles (256 sec)
16 cycles (2 sec)
32 cycles (4 sec)
64 cycles (8 sec)
128 cycles (16 sec)
256 cycles (32 sec)
512 cycles (64 sec)
1024 cycles (128 sec)
2048 cycles (256 sec)
(Note 1)
MIN