ADT7473ARQZ-1R7 ON Semiconductor, ADT7473ARQZ-1R7 Datasheet - Page 27

• Manufacturer Part Number: ADT7473ARQZ-1R7
• Description: IC THERM MON FAN CTLR 16-QSOP
• Manufacturer: ON Semiconductor
• Series: dBCool®r

Specifications of ADT7473ARQZ-1R7

• Function: Fan Control, Temp Monitor
• Topology: ADC, Comparator, Fan Speed Counter, Multiplexer, Register Bank
• Sensor Type: External & Internal
• Sensing Temperature: -40°C ~ 125°C, External Sensor
• Output Type: SMBus™
• Output Alarm: No
• Output Fan: Yes
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 16-QSOP
• Full Temp Accuracy: +/- 0.5 C
• Digital Output - Bus Interface: Serial (3-Wire, 4-Wire)
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

1 kW, suitable values for R1 and R2 are 120 kW and 47 kW,
respectively. This gives a high input voltage of 3.35 V.
Fan Speed Measurement
pulses directly, because the fan speed could be less than
1000 RPM and it would take several seconds to accumulate
a reasonably large and accurate count. Instead, the period of
the fan revolution is measured by gating an on−chip 90 kHz
oscillator into the input of a 16−bit counter for N periods of
the fan TACH output (see Figure 44), so the accumulated
count is actually proportional to the fan tachometer period,
and inversely proportional to the fan speed.
settings of the TACH pulses per revolution register (Register
0x7B). This register contains two bits for each fan, allowing
one, two (default), three, or four TACH pulses to be counted.
Fan Speed Measurement Registers
of a 2−byte read from the ADT7473/ADT7473−1.
Register 0x28, TACH1 Low Byte = 0x00 default
Register 0x29, TACH1 High Byte = 0x00 default
Register 0x2A, TACH2 Low Byte = 0x00 default
Register 0x2B, TACH2 High Byte = 0x00 default
Register 0x2C, TACH3 Low Byte = 0x00 default
Register 0x2D, TACH3 High Byte = 0x00 default
Register 0x2E, TACH4 Low Byte = 0x00 default
Register 0x2F, TACH4 High Byte = 0x00 default
CLOCK
PWM
TACH
Figure 43. Fan with Strong TACH pullup to > V
With a pullup voltage of 12 V and pullup resistor less than
The fan counter does not count the fan TACH output
N, the number of pulses counted, is determined by the
The fan tachometer readings are 16−bit values consisting
12V
Totem−Pole Output, Attenuated with R1/R2
1
Figure 44. Fan Speed Measurement
2
3
4
<1kΩ
TACH
OUTPUT
R1*
*SEE TEXT
R2*
TACH
ADT7473/
ADT7473-1
FAN SPEED
COUNTER
V
CC
CC
http://onsemi.com
or
27
Reading Fan Speed from the ADT7473/ADT7473−1
for each measurement. The low byte should be read first.
This causes the high byte to be frozen until both high and low
byte registers have been read, preventing erroneous TACH
readings. The fan tachometer reading registers report back
the number of 11.11 ms period clocks (90 kHz oscillator)
gated to the fan speed counter, from the rising edge of the
first fan TACH pulse to the rising edge of the third fan TACH
pulse (assuming two pulses per revolution are being
counted). Because the device is essentially measuring the
fan TACH period, the higher the count value, the slower the
fan is actually running. A 16−bit fan tachometer reading of
0xFFFF indicates either the fan has stalled or is running very
slowly (<100 RPM).
High Limit > Comparison Performed
below a fan TACH limit by 1 sets the appropriate status bit
and can be used to generate an SMBALERT.
Measuring Fan TACH
measurements are locked. In effect, an internal read of the
low byte has been made for each TACH input. The net result
of this is that all TACH readings are locked until the high
byte is read from the corresponding TACH registers. All
TACH related interrupts are also ignored until the
appropriate high byte is read.
measurements are unlocked and interrupts are processed as
normal.
Fan TACH Limit Registers
of two bytes.
Register 0x54, TACH1 Minimum Low Byte = 0xFF default
Register 0x55, TACH1 Minimum High Byte = 0xFF default
Register 0x56, TACH2 Minimum Low Byte = 0xFF default
Register 0x57, TACH2 Minimum High Byte = 0xFF default
Register 0x58, TACH3 Minimum Low Byte = 0xFF default
Register 0x59, TACH3 Minimum High Byte = 0xFF default
Register 0x5A, TACH4 Minimum Low Byte = 0xFF default
Register 0x5B, TACH4 Minimum High Byte = 0xFF default
Fan Speed Measurement Rate
second.
when set, updates the fan TACH readings every 250 ms.
but are powered directly from 5.0 V or 12 V, their associated
dc bit in Configuration Register 3 should be set. This allows
TACH readings to be taken on a continuous basis for fans
The measurement of fan speeds involves a 2−register read
Because the actual fan TACH period is measured, falling
When the ADT7473/ADT7473−1 starts up, TACH
Once the corresponding high byte has been read, TACH
The fan TACH limit registers are 16−bit values consisting
The fan TACH readings are normally updated once every
The FAST bit (Bit 3) of Configuration Register 3 (0x78),
If any of the fans are not being driven by a PWM channel