ADE7878ACPZ Analog Devices Inc, ADE7878ACPZ Datasheet - Page 52

• Manufacturer Part Number: ADE7878ACPZ
• Description: IC ENERGY METERING 3PH 40LFCSP
• Manufacturer: Analog Devices Inc

Specifications of ADE7878ACPZ

• Input Impedance: 400 KOhm
• Measurement Error: 0.1%
• Voltage - I/o High: 2.4V
• Voltage - I/o Low: 0.4V
• Current - Supply: 22mA
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 40-WFQFN, CSP Exposed Pad
• Meter Type: 3 Phase
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Digital Ic Case Style: LFCSP
• No. Of Pins: 40
• Msl: MSL 1 - Unlimited
• Peak Reflow Compatible (260 C): Yes
• Supply Voltage Min: 3V
• Rohs Compliant: Yes
• Leaded Process Compatible: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADE7854/ADE7858/ADE7868/ADE7878
where:
n is the discrete time sample number.
T is the sample period.
On the ADE7858/ADE7868/ADE7878, the total phase reactive
powers are accumulated in the AVARHR, BVARHR, and
CVARHR 32-bit signed registers. The fundamental phase reactive
powers are accumulated in the AFVARHR, BFVARHR, and
CFVARHR 32-bit signed registers. The reactive energy register
content can roll over to full-scale negative (0x80000000) and
continue increasing in value when the reactive power is positive.
Conversely, if the reactive power is negative, the energy register
underflows to full-scale positive (0x7FFFFFFF) and continues
to decrease in value.
Bit 2 (REHF) in the STATUS0 register is set when Bit 30 of
one of the xVARHR registers changes, signifying one of these
registers is half full. If the reactive power is positive, the var-hour
ReactiveEn
VA
IA
APHCAL
ergy
=
AVGAIN
AIGAIN
DIGITAL SIGNAL PROCESSOR
∫
q
( )
t
dt
HPFDIS
HPFDIS
=
[23:0]
[23:0]
HPF
HPF
Lim
T
→
0
⎧
⎨
⎩
n
∑
INTEGRATOR
∞
=
0
q
DIGITAL
( )
nT
×
Figure 66. Total Reactive Energy Accumulation
T
⎫
⎬
⎭
ALGORITHM
REACTIVE
POWER
TOTAL
(37)
Rev. D | Page 52 of 96
AVARGAIN
AVAROS
register becomes half full when it increments from 0x3FFF FFFF
to 0x4000 0000. If the reactive power is negative, the var-hour
register becomes half full when it decrements from 0xC000 0000
to 0xBFFF FFFF. Analogously, Bit 3 (FREHF) in the STATUS0
register is set when Bit 30 of one of the xFVARHR registers
changes, signifying one of these registers is half full.
Setting Bits[3:2] in the MASK0 register enable the FREHF and
REHF interrupts, respectively. If enabled, the IRQ0 pin is set
low and the status bit is set to 1 whenever one of the energy
registers, xVARHR (for REHF interrupt) or xFVARHR (for
FREHF interrupt), becomes half full. The status bit is cleared
and the IRQ0 pin is set to high by writing to the STATUS0
register with the corresponding bit set to 1.
Setting Bit 6 (RSTREAD) of the LCYCMODE register enables a
read-with-reset for all var-hour accumulation registers, that is,
the registers are reset to 0 after a read operation.
2
4
ACCUMULATOR
AVAR
VARTHR[47:0]
AVARHR[31:0]
REVRPA BIT IN
STATUS0[31:0]
REGISTER
32-BIT