ADE7878ACPZ Analog Devices Inc, ADE7878ACPZ Datasheet - Page 39

• Manufacturer Part Number: ADE7878ACPZ
• Description: IC ENERGY METERING 3PH 40LFCSP
• Manufacturer: Analog Devices Inc

Specifications of ADE7878ACPZ

• Input Impedance: 400 KOhm
• Measurement Error: 0.1%
• Voltage - I/o High: 2.4V
• Voltage - I/o Low: 0.4V
• Current - Supply: 22mA
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 40-WFQFN, CSP Exposed Pad
• Meter Type: 3 Phase
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Digital Ic Case Style: LFCSP
• No. Of Pins: 40
• Msl: MSL 1 - Unlimited
• Peak Reflow Compatible (260 C): Yes
• Supply Voltage Min: 3V
• Rohs Compliant: Yes
• Leaded Process Compatible: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

REFERENCE CIRCUIT
The nominal reference voltage at the REF
0.075% V. This is the reference voltage used for the ADCs in
the ADE7854/ADE7858/ADE7868/ADE7878. The REF
pin can be overdriven by an external source, for example, an
external 1.2 V reference. The voltage of the ADE78xx reference
drifts slightly with temperature; see the Specifications section for
the temperature coefficient specification (in ppm/°C). The value of
the temperature drift varies from part to part. Because the refer-
ence is used for all ADCs, any x% drift in the reference results in
a 2x% deviation of the meter accuracy. The reference drift resulting
from temperature changes is usually very small and typically
much smaller than the drift of other components on a meter.
Alternatively, the meter can be calibrated at multiple temperatures.
If Bit 0 (EXTREFEN) in the CONFIG2 register is cleared to 0 (the
default value), the ADE7854/ADE7858/ADE7868/ADE7878 use
the internal voltage reference. If the bit is set to 1, the external
voltage reference is used. Set the CONFIG2 register during the
PSM0 mode. Its value is maintained during the PSM1, PSM2, and
PSM3 power modes.
DIGITAL SIGNAL PROCESSOR
The ADE7854/ADE7858/ADE7868/ADE7878 contain a fixed
function digital signal processor (DSP) that computes all powers
and rms values. It contains program memory ROM and data
memory RAM.
The program used for the power and rms computations is
stored in the program memory ROM and the processor executes
it every 8 kHz. The end of the computations is signaled by
setting Bit 17 (DREADY) to 1 in the STATUS0 register. An
interrupt attached to this flag can be enabled by setting Bit 17
(DREADY) in the MASK0 register. If enabled, the IRQ0 pin is
set low and Status Bit DREADY is set to 1 at the end of the
computations. The status bit is cleared and the IRQ0 pin is set
to high by writing to the STATUS0 register with Bit 17 (DREADY)
set to 1.
The registers used by the DSP are located in the data memory
RAM, at addresses between 0x4380 and 0x43BE. The width of
this memory is 28 bits. Within the DSP core, the DSP contains a
two stage pipeline. This means that when a single register needs
to be initialized, two more writes are required to ensure the
value has been written into RAM, and if two or more registers
need to be initialized, the last register must be written two more
times to ensure the value has been written into RAM.
As explained in the Power-Up Procedure section, at power-up
or after a hardware or software reset, the DSP is in idle mode.
No instruction is executed. All the registers located in the data
memory RAM are initialized at 0, their default values, and they
can be read/written without any restriction. The run register,
used to start and stop the DSP, is cleared to 0x0000. The run
register needs to be written with 0x0001 for the DSP to start
code execution. It is recommended to first initialize all ADE78xx
registers located in the data memory RAM with their desired
IN/OUT
pin is 1.2 ±
IN/OUT
Rev. D | Page 39 of 96
values. Next, write the last register in the queue two additional
times to flush the pipeline, and then write the run register with
0x0001. In this way, the DSP starts the computations from a
desired configuration.
To protect the integrity of the data stored in the data memory
RAM of the DSP (addresses between 0x4380 and 0x43BE), a
write protection mechanism is available. By default, the
protection is disabled and registers placed between 0x4380 and
0x43BE can be written without restriction. When the protection
is enabled, no writes to these registers is allowed. Registers can
be always read, without restriction, independent of the write
protection state.
To enable the protection, write 0xAD to an internal 8-bit
register located at Address 0xE7FE, followed by a write of 0x80
to an internal 8-bit register located at Address 0xE7E3.
It is recommended to enable the write protection before starting
the DSP. If any data memory RAM based register needs to be
changed, simply disable the protection, change the value and
then re-enable the protection. There is no need to stop the DSP
to change these registers.
To disable the protection, write 0xAD to an internal 8-bit
register located at Address 0xE7FE, followed by a write of 0x00
to an internal 8-bit register located at Address 0xE7E3.
The recommended procedure to initialize the registers located
in the data memory RAM is as follows:
•
•
•
•
•
There is no obvious reason to stop the DSP if the ADE78xx is
maintained in PSM0 normal mode. All ADE78xx registers,
including ones located in the data memory RAM, can be
modified without stopping the DSP. However, to stop the DSP,
0x0000 has to be written into run register. To restart the DSP,
one of the following procedures must be followed:
ADE7854/ADE7858/ADE7868/ADE7878
Initialize all registers. Write the last register in the queue
three times to ensure its value was written into the RAM.
Initialize all of the other registers of the ADE7854/ADE7858/
ADE7868/ADE7878 here as well.
Enable the write protection by writing 0xAD to an internal
8-bit register located at Address 0xE7FE, followed by a write of
0x80 to an internal 8-bit register located at Address 0xE7E3.
Read back all data memory RAM registers to ensure they
were initialized with the desired values.
In the remote case that one or more registers are not initia-
lized correctly, disable the protection by writing 0xAD to
an internal 8-bit register located at Address 0xE7FE, followed
by a write of 0x00 to an internal 8-bit register located at
Address 0xE7E3. Reinitialize the registers. Write the last
register in the queue three times. Enable the write protec-
tion by writing 0xAD to an internal 8-bit register located
at Address 0xE7FE, followed by a write of 0x80 to an internal
8-bit register located at Address 0xE7E3..
Start the DSP by setting run = 1.