ADE7878ACPZ Analog Devices Inc, ADE7878ACPZ Datasheet - Page 48

• Manufacturer Part Number: ADE7878ACPZ
• Description: IC ENERGY METERING 3PH 40LFCSP
• Manufacturer: Analog Devices Inc

Specifications of ADE7878ACPZ

• Input Impedance: 400 KOhm
• Measurement Error: 0.1%
• Voltage - I/o High: 2.4V
• Voltage - I/o Low: 0.4V
• Current - Supply: 22mA
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 40-WFQFN, CSP Exposed Pad
• Meter Type: 3 Phase
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Digital Ic Case Style: LFCSP
• No. Of Pins: 40
• Msl: MSL 1 - Unlimited
• Peak Reflow Compatible (260 C): Yes
• Supply Voltage Min: 3V
• Rohs Compliant: Yes
• Leaded Process Compatible: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADE7854/ADE7858/ADE7868/ADE7878
CFWATTHR 32-bit signed registers. The active energy register
content can roll over to full-scale negative (0x80000000) and
continue increasing in value when the active power is positive.
Conversely, if the active power is negative, the energy register
underflows to full-scale positive (0x7FFFFFFF) and continues
decreasing in value.
Bit 0 (AEHF) in the STATUS0 register is set when Bit 30 of
one of the xWATTHR registers changes, signifying one of these
registers is half full. If the active power is positive, the watt-hour
register becomes half full when it increments from 0x3FFF FFFF to
0x4000 0000. If the active power is negative, the watt-hour
register becomes half full when it decrements from 0xC000
0000 to 0xBFFF FFFF. Similarly, Bit 1 (FAEHF) in STATUS0
register, is set when Bit 30 of one of the xFWATTHR registers
changes, signifying one of these registers is half full.
Setting Bits[1:0] in the MASK0 register enable the FAEHF and
AEHF interrupts, respectively. If enabled, the IRQ0 pin is set
low and the status bit is set to 1 whenever one of the energy
registers, xWATTHR (for the AEHF interrupt) or xFWATTHR
(for the FAEHF interrupt), become half full. The status bit is
cleared and the IRQ0 pin is set to logic high by writing to the
STATUS0 register with the corresponding bit set to 1.
Setting Bit 6 (RSTREAD) of the LCYCMODE register enables a
read-with-reset for all watt-hour accumulation registers, that is,
the registers are reset to 0 after a read operation.
Integration Time Under Steady Load
The discrete time sample period (T) for the accumulation register
is 125 μs (8 kHz frequency). With full-scale sinusoidal signals
on the analog inputs and the watt gain registers set to 0x00000, the
average word value from each LPF2 is PMAX = 33,516,139 =
0x1FF6A6B. If the WTHR register threshold is set at the PMAX
level, this means the DSP generates a pulse that is added at watt-
hour registers every 125 μs.
The maximum value that can be stored in the watt-hour
accumulation register before it overflows is 2
0x7FFFFFFF. The integration time is calculated as
Energy Accumulation Modes
The active power accumulated in each watt-hour accumulation
32-bit register (AWATTHR, BWATTHR, CWATTHR,
AFWATTHR, BFWATTHR, and CFWATTHR) depends on the
configuration of Bit 5 and Bit 4 (CONSEL bits) in the ACCMODE
register. The various configurations are described in Table 15.
Time = 0x7FFF,FFFF × 125 μs = 74 hr 33 min 55 sec
31
− 1 or
(27)
Rev. D | Page 48 of 96
Table 15. Inputs to Watt-Hour Accumulation Registers
CONSEL
00
01
10
11
Depending on the polyphase meter service, choose the appro-
priate formula to calculate the active energy. The American
ANSI C12.10 standard defines the different configurations of
the meter. Table 16 describes which mode to choose in these
various configurations.
Table 16. Meter Form Configuration
ANSI Meter Form
5S/13S
6S/14S
8S/15S
9S/16S
Bits[1:0] (WATTACC[1:0]) in the ACCMODE register determine
how the CF frequency output can be generated as a function of
the total and fundamental active powers. Whereas the watt-hour
accumulation registers accumulate the active power in a signed
format, the frequency output can be generated in signed mode
or in absolute mode as a function of the WATTACC[1:0] bits.
See the Energy-to-Frequency Conversion section for details.
Line Cycle Active Energy Accumulation Mode
In line cycle energy accumulation mode, the energy accumula-
tion is synchronized to the voltage channel zero crossings such
that active energy is accumulated over an integral number of
half line cycles. The advantage of summing the active energy
over an integer number of line cycles is that the sinusoidal compo-
nent in the active energy is reduced to 0. This eliminates any
ripple in the energy calculation and allows the energy to be
accumulated accurately over a shorter time. By using the line
cycle energy accumulation mode, the energy calibration can be
greatly simplified, and the time required to calibrate the meter
can be significantly reduced. In line cycle energy accumulation
mode, the ADE7854/ADE7858/ADE7868/ADE7878 transfer the
active energy accumulated in the 32-bit internal accumulation
registers into the xWATHHR or xFWATTHR registers after an
integral number of line cycles, as shown in Figure 65. The
number of half line cycles is specified in the LINECYC register.
AWATTHR
VA × IA
VA × IA
VA × IA
VA × IA
Configuration
3-wire delta
4-wire wye
4-wire delta
4-wire wye
BWATTHR
VB × IB
0
VB × IB
VB = −VA − VC
VB × IB
VB = −VA
CONSEL
01
10
11
00
CWATTHR
VC × IC
VC × IC
VC × IC
VC × IC