EPC4QI100 Altera, EPC4QI100 Datasheet - Page 41

IC CONFIG DEVICE 4MBIT 100-PQFP

EPC4QI100

Manufacturer Part Number
EPC4QI100
Description
IC CONFIG DEVICE 4MBIT 100-PQFP
Manufacturer
Altera
Series
EPCr
Datasheet

Specifications of EPC4QI100

Programmable Type
In System Programmable
Memory Size
4Mb
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
100-MQFP, 100-PQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
544-2189

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Chapter 2: Altera Enhanced Configuration Devices
Dynamic Configuration (Page Mode) Implementation Overview
Dynamic Configuration (Page Mode) Implementation Overview
© December 2009 Altera Corporation
1
Pages in enhanced configuration devices allow you to organize and store various
configurations for entire systems that use one or more Altera PLDs. This dynamic
configuration (or page mode) feature allows systems to dynamically reconfigure their
PLDs with different configuration files.
You can use different pages to store configuration files that support different
standards (for example, I/O standards, memory). Alternatively, the different pages
can place the system in different modes. For instance, page 0 could contain a
configuration .sof for the PLD that only processes data packets; page 1 could contain a
configuration file for the same PLD that processes data and voice packets.
With the ability to dynamically switch pages, you can also configure Altera devices
with various revisions for debugging without having to reprogram the configuration
device. For example, you can configure a device that is on “stand-by” to perform
another function and then reconfigure it back with the original configuration file.
A page is a section of the flash memory space that contains configuration data for all
PLDs in the system. One page stores one system configuration regardless of the
number of PLDs in the system. The size of each page is dynamic and can change each
time the enhanced configuration device is reprogrammed. Enhanced configuration
devices support a maximum of eight pages of configuration data, or eight system
configurations. The number of pages is also limited to the density of the configuration
device.
The number of pages required in a system is not dependent on the number of PLDs in
the system, but depends on the number of unique system configurations.
External page mode input pins PGM[2..0]determine which page to use during PLD
configuration, and page pointers determine the data location. Each page pointer
consists of a starting address register and a length count register. The word-
addressable starting address register (23 bits) is used to determine where the page
begins in the flash memory. The count register (25 bits) determines the length of the
page counted in nibbles (group of 4 bits equaling half of a byte).
block diagram of the option-bit space and its address locations.
Figure 2–4. Option-Bit Memory Map
For example, a page for the EPC16 configuration device must start between word
addresses 0x08020h and 0xFFFFFh and cannot overlap with other pages. Refer to
Figure 2–5
for an EPC16 page mode example using three pages.
0801Fh
08009h
08008h
24
8
15
24
8
15
24
8
15
CNT7
CNT1
CNT0
CNT1
ADDR1
ADDR0
ADDR7
CNT7
CNT0
0
0
0
22
22
22
Configuration Handbook (Complete Two-Volume Set)
ADDR0
ADDR7
ADDR1
16
16
16
9
0
9
0
9
0
Figure 2–4
shows a
2–5

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