RC28F128K3C115 Intel, RC28F128K3C115 Datasheet - Page 53

• Manufacturer Part Number: RC28F128K3C115
• Description: IC FLASH 128MBIT 115NS 64BGA
• Manufacturer: Intel

Specifications of RC28F128K3C115

• Rohs Status: RoHS non-compliant
• Format - Memory: FLASH
• Memory Type: StrataFlash® FLASH
• Memory Size: 128M (8Mx16)
• Speed: 115ns
• Interface: Parallel
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-BGA
• Other names: 848521

13.1.1
13.1.2
13.1.3
13.1.4
13.1.5
Datasheet
Note: Only device reset or power-down can clear the lock-down status bit.
Note: A Block Lock Setup command followed by any command other than Block Lock, Block Unlock,
Block Lock
All blocks default to the locked state after initial power-up or reset. An unlocked block can be
locked by issuing the Block Lock command sequence. This sets the block lock status bit and fully
protects the block from program or erase. Attempted program or erase operations to a locked block
will return an error in SR1.
Block Unlock
A locked block can be unlocked by issuing the Block Unlock command. All unlocked blocks return
to the locked state when the device is reset or powered-down. Unlocked blocks may be
programmed or erased.
Block Lock-Down
The Lock-Down Block command adds an additional level of security to the device. Issuing the
Lock-Down Block command sets the lock-down status bit and locks the block. The Lock-Down
Block command can be used if the block’s current state is either locked or unlocked. Once this bit
is set, WP# is enabled as a hardware lock control for that particular block. If a block is locked-
down and WP# is de-asserted, the user may issue the Unlock Block command to allow program or
erase operations on that block.
Block Lock During Erase Suspend
Blocks may be locked, unlocked, or locked down during an erase suspend operation. First, write
the Erase Suspend command to the device. After checking SR7 and SR6 to determine that the erase
operation has suspended, write the desired lock command sequence to a block. The lock status
bit(s) will change immediately. If the block being locked or locked-down is the same block that is
suspended, the lock status bit(s) will still change immediately, but the erase operation will
complete when resumed. After completing lock, unlock, read, or program operations, resume the
erase operation with the Erase Resume command.
or Block Lock-Down will produce a command sequence error and set Status Register bits SR4 and
SR5. If this error occurs while an erase is suspended, SR4 and SR5 will remain set after the erase
operation is resumed unless the Status Register is cleared first using the Clear Status Register
command. Otherwise, possible erase errors may become masked by the command sequence error.
Locking operations cannot occur during program suspend.
(WSM)” on page 59
WP# Lock-Down Control
If the lock-down status bit is set for a particular block, the WP# signal is then enabled as a master
lock/unlock override for that particular block. When WP# is asserted, all blocks that have the lock-
down status bit set are automatically put into the lock-down state and cannot be unlocked with the
Unlock Block command.
Once WP# is de-asserted, the block reverts back to a locked state; only then can it be unlocked via
software.
28F640K3, 28F640K18, 28F128K3, 28F128K18, 28F256K3, 28F256K18
shows valid commands during erase suspend.
Appendix A, “Write State Machine
53