RC28F128K3C115 Intel, RC28F128K3C115 Datasheet - Page 44

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RC28F128K3C115

Manufacturer Part Number
RC28F128K3C115
Description
IC FLASH 128MBIT 115NS 64BGA
Manufacturer
Intel
Datasheet

Specifications of RC28F128K3C115

Rohs Status
RoHS non-compliant
Format - Memory
FLASH
Memory Type
StrataFlash® FLASH
Memory Size
128M (8Mx16)
Speed
115ns
Interface
Parallel
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
64-BGA
Other names
848521

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
RC28F128K3C115
Manufacturer:
Intel
Quantity:
10 000
28F640K3, 28F640K18, 28F128K3, 28F128K18, 28F256K3, 28F256K18
10.3.5
10.3.6
10.3.7
10.3.8
44
Table 18. Burst Sequence Word Ordering
WAIT Delay
The WAIT Delay (WD) bit controls the WAIT signal’s delay behavior during synchronous burst
reads. WAIT can be asserted either during, or one clock cycle before, valid data is output on
D[15:0].When WD is set, WAIT is de-asserted one clock before valid data (default). When WD is
cleared, WAIT is de-asserted with valid data. The setting of WD is dependent on the system and
CPU data sampling requirements.
Burst Sequence
The Burst Sequence (BR) bit selects linear-burst sequence (default). Only linear-burst sequence is
supported.
Clock Edge
The Clock Edge (CE) bit selects either a rising (default) or falling clock edge for CLK. This is the
clock edge that is used at the start of a burst cycle to output synchronous data and to assert/de-
assert WAIT.
Burst Length
BL[2:0] selects the linear burst length for all synchronous burst reads of the flash memory. The
burst length can be configured to be an 8-word or a 16-word burst. Once a burst cycle begins, the
device will output synchronous burst data until it reaches the end of the burstable address space.
(DEC)
Addr.
Start
14
15
0
1
2
3
4
5
6
7
Table 18
shows the synchronous burst sequence for all burst lengths.
(BL[2:0] = 010)
0-1-2-3-4-5-6-7
1-2-3-4-5-6-7-0
2-3-4-5-6-7-0-1
3-4-5-6-7-0-1-2
4-5-6-7-0-1-2-3
5-6-7-0-1-2-3-4
6-7-0-1-2-3-4-5
7-0-1-2-3-4-5-6
8-Word Burst
Burst Addressing Sequence (DEC)
14-15-0-1-2…12-13
15-0-1-2-3…13-14
0-1-2-3-4…14-15
7-8-9-10-11…5-6
1-2-3-4-5…15-0
6-7-8-9-10…4-5
16-Word Burst
(BL[2:0] = 011)
2-3-4-5-6…0-1
3-4-5-6-7…1-2
4-5-6-7-8…2-3
5-6-7-8-9…3-4
Datasheet

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