LH28F160BJE-BTL90 Sharp Microelectronics, LH28F160BJE-BTL90 Datasheet - Page 12

• Manufacturer Part Number: LH28F160BJE-BTL90
• Description: IC FLASH 16MBIT 90NS 48TSOP
• Manufacturer: Sharp Microelectronics

Specifications of LH28F160BJE-BTL90

• Rohs Status: RoHS non-compliant
• Format - Memory: FLASH
• Memory Type: Boot Block FLASH
• Memory Size: 16M (2M x 8 or 1M x 16)
• Speed: 90ns
• Interface: Parallel
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 48-TSOP
• Other names: 425-1823; LHF16J06

3.5 Read Identifier Codes
The
manufacturer code, device code, block lock configuration
codes for each block and the permanent lock configuration
code (see Figure 4). Using the manufacturer and device
codes, the system CPU can automatically match the device
with its proper algorithms. The block lock and permanent
lock configuration codes identify locked and unlocked
blocks and permanent lock-bit setting.
3.6 Write
Writing commands to the CUI enable reading of device
data and identifier codes. They also control inspection and
clearing of the status register. When V
V
erase, full chip erase, word/byte write and lock-bit
configuration.
The Block Erase command requires appropriate command
data and an address within the block to be erased. The Full
Chip Erase command requires appropriate command data
and an address within the device. The Word/Byte Write
command requires the command and address of the
location to be written. Set Permanent and Block Lock-Bit
commands require the command and address within the
device (Permanent Lock) or block within the device
(Block Lock) to be locked. The Clear Block Lock-Bits
command requires the command and address within the
device.
The CUI does not occupy an addressable memory
location. It is written when WE# and CE# are active. The
address and data needed to execute a command are latched
on the rising edge of WE# or CE# (whichever goes high
first). Standard microprocessor write timings are used.
Figures 16 and 17 illustrate WE# and CE# controlled write
operations.
4 COMMAND DEFINITIONS
When the V
the status register, identifier codes, or blocks are enabled.
Placing V
erase, full chip erase, word/byte write and lock-bit
configuration operations.
Device operations are selected by writing specific
commands into the CUI. Table 3 defines these commands.
sharp
CCW
=V
read
CCWH1/2
CCWH1/2
CCW
identifier
voltage ≤V
, the CUI additionally controls block
on V
codes
CCW
CCWLK
enables successful block
operation
, read operations from
CC
=2.7V-3.6V and
outputs
the
LHF16J06
[A
FFFFF
F7FFF
0FFFF
07FFF
06FFF
02FFF
01FFF
00FFF
F8003
F8002
F8001
F8000
10000
08003
08002
08001
08000
07003
07002
07001
07000
03000
02003
02002
02001
02000
01003
01002
01001
01000
00004
00003
00002
00001
00000
19
Figure 4. Device Identifier Code Memory Map
-A
0
]
*
*
: Address A
Parameter Block 5 Lock Configuration Code
Parameter Block 0 Lock Configuration Code
Main Block 30 Lock Configuration Code
Main Block 0 Lock Configuration Code
Boot Block 1 Lock Configuration Code
Boot Block 0 Lock Configuration Code
Permanent Lock Configuration Code
Reserved for Future Implementation
Reserved for Future Implementation
Reserved for Future Implementation
Reserved for Future Implementation
Reserved for Future Implementation
Reserved for Future Implementation
Reserved for Future Implementation
Reserved for Future Implementation
Reserved for Future Implementation
Reserved for Future Implementation
Reserved for Future Implementation
(Parameter Blocks 1 through 4)
(Main Blocks 1 through 29)
-1
don’t care.
Manufacturer Code
Bottom Boot
Device Code
Parameter Block 5
Parameter Block 0
Main Block 30
Main Block 0
Boot Block 1
Boot Block 0
Rev. 1.26
9