LH52256C-70LL Sharp Microelectronics, LH52256C-70LL Datasheet - Page 7

• Manufacturer Part Number: LH52256C-70LL
• Description: IC SRAM 256KBIT 70NS 28DIP
• Manufacturer: Sharp Microelectronics

Specifications of LH52256C-70LL

• Rohs Status: RoHS non-compliant
• Format - Memory: RAM
• Memory Type: SRAM
• Memory Size: 256K (32K x 8)
• Speed: 70ns
• Interface: Parallel
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 28-DIP (0.600", 15.24mm)
• Other names: 425-1833-5

CMOS 256K (32K
NOTES:
1. A write occurs during the overlap of a LOW CE, and a LOW WE.
2. t
3. t
4. t
5. During this period, I/O pins are in the output state, therefore the input
6. If CE goes LOW simultaneously with WE going LOW or after WE going
7. If CE goes HIGH simulaneously with WE going HIGH or before WE
A write begins at the latest transition among CE going LOW, and
WE going LOW. A write ends at the earliest transition among CE
going HIGH, and WE going HIGH. t
LOW, the outputs remain in high impedance state.
going HIGH, the outputs remain in high impedance state.
of write to the end of write.
CW
AS
WR
signals of opposite phase to the outputs must not be applied.
is measured from the address valid to the beginning of write.
is measured from the later of CE going LOW to the end of write.
is measured from the end of write to the address change.
ADDRESS
D
WE
OE
OUT
D
CE
IN
8) Static RAM
(NOTE 6)
WP
is measured from the beginning
Figure 5. Write Cycle (OE Controlled)
(NOTE 3)
t
AS
t
OHZ
t
AW
(NOTE 5)
t
WC
(NOTE 2)
t
CW
(NOTE 1)
t
WP
t
DW
DATA VALID
t
t
WR
WR
t
DH
(NOTE 4)
(NOTE 4)
LH52256C/CH
52256C-4
7