M27C801-100B1 STMicroelectronics, M27C801-100B1 Datasheet - Page 6

IC OTP 8MBIT 100NS 32DIP

M27C801-100B1

Manufacturer Part Number
M27C801-100B1
Description
IC OTP 8MBIT 100NS 32DIP
Manufacturer
STMicroelectronics
Datasheets

Specifications of M27C801-100B1

Format - Memory
EPROMs
Memory Type
OTP EPROM
Memory Size
8M (1M x 8)
Speed
100ns
Interface
Parallel
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Package / Case
32-DIP (0.600", 15.24mm)
Organization
1Mx8
Interface Type
Parallel
In System Programmable
External
Access Time (max)
100ns
Package Type
PDIP
Reprogramming Technique
OTP
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Supply Current
50mA
Pin Count
32
Mounting
Through Hole
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Capacitance, Input
6 pF
Capacitance, Output
12 pF
Current, Input, Leakage
±10 μA
Current, Operating
35 mA
Current, Output, Leakage
±10
Current, Supply
35 mA (Max.)
Density
8M
Temperature, Operating
0 to +70 °C
Temperature, Operating, Maximum
70 °C
Temperature, Operating, Minimum
0 °C
Time, Access
100 ns
Time, Fall
≤20 ns
Time, Rise
≤20 ns
Voltage, Input, High
6 V
Voltage, Input, High Level
2 V (Min.)
Voltage, Input, Low
0.8 V
Voltage, Input, Low Level
0.80 V (Max.)
Voltage, Output, High
3.6 V (TTL), 4.3 V (CMOS)
Voltage, Output, Low
0.4 V
Voltage, Supply
5 V
Access Time
45ns
Low Power Consumption
- Active current 35mA at 5 MHz - Standby current 100 μA
Programming Voltage
12.75 V ± 0.25 V
Memory Configuration
1M X 8
Supply Voltage Range
4.5V To 5V
Memory Case Style
DIP
No. Of Pins
32
Rohs Compliant
Yes
Operating Temperature Range
0°C To +70°C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-1687-5

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M27C801
Table 8B. Read Mode AC Characteristics
(T
Note: 1. V
Figure 5. Read Mode AC Waveforms
System Considerations
The power switching characteristics of Advanced
CMOS EPROMs require careful decoupling of the
devices. The supply current, I
ments that are of interest to the system designer:
the standby current level, the active current level,
and transient current peaks that are produced by
the falling and rising edges of E. The magnitude of
the transient current peaks is dependent on the
capacitive and inductive loading of the device at
the output. The associated transient voltage peaks
can be suppressed by complying with the two line
6/16
t
Symbol
t
EHQZ
GHQZ
A
t
t
t
t
GLQV
AXQX
AVQV
ELQV
= 0 to 70 °C or –40 to 85 °C; V
2. Sampled only, not 100% tested.
(2)
(2)
CC
Q0-Q7
A0-A19
E
G
must be applied simultaneously with or before V
t
ACC
t
t
t
Alt
t
t
CE
OE
DF
DF
OH
Address Valid to Output Valid
Chip Enable Low to Output Valid
Output Enable Low to Output
Valid
Chip Enable High to Output Hi-Z
Output Enable High to Output
Hi-Z
Address Transition to Output
Transition
Parameter
CC
, has three seg-
CC
tAVQV
tELQV
= 5V ± 10%)
tGLQV
VALID
(1)
PP
and removed simultaneously or after V
E = V
E = V
Test Condition
GV
GV
IL
IL
output control and by properly selected decoupling
capacitors. It is recommended that a 0.1µF ceram-
ic capacitor be used on every device between V
and V
tor of low inherent inductance and should be
placed as close to the device as possible. In addi-
tion, a 4.7µF bulk electrolytic capacitor should be
used between V
es. The bulk capacitor should be located near the
power supply connection point. The purpose of the
bulk capacitor is to overcome the voltage drop
caused by the inductive effects of PCB traces.
E = V
E = V
, GV
, GV
PP
PP
= V
= V
PP
PP
IL
IL
SS
IL
IL
= V
= V
. This should be a high frequency capaci-
IL
IL
tAXQX
Min
0
0
0
CC
-80
tGHQZ
tEHQZ
VALID
and V
Max
80
80
40
35
35
PP
M27C801
.
SS
for every eight devic-
-100/-120/-150
Min
0
0
0
AI01583B
Hi-Z
Max
100
100
50
40
40
Unit
ns
ns
ns
ns
ns
ns
CC

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