IS61NLP25636A-200B3LI ISSI, Integrated Silicon Solution Inc, IS61NLP25636A-200B3LI Datasheet - Page 7

• Manufacturer Part Number: IS61NLP25636A-200B3LI
• Description: IC SRAM 9MBIT 200MHZ 165FBGA
• Manufacturer: ISSI, Integrated Silicon Solution Inc

Specifications of IS61NLP25636A-200B3LI

• Format - Memory: RAM
• Memory Type: SRAM - Synchronous
• Memory Size: 9M (256K x 36)
• Speed: 200MHz
• Interface: Parallel
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 165-FBGA
• Density: 9Mb
• Access Time (max): 3.1ns
• Sync/async: Synchronous
• Architecture: SDR
• Clock Freq (max): 200MHz
• Operating Supply Voltage (typ): 3.3V
• Address Bus: 18b
• Package Type: BGA
• Operating Temp Range: -40C to 85C
• Number Of Ports: 4
• Supply Current: 280mA
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (max): 3.465V
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 165
• Word Size: 36b
• Number Of Words: 256K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

IS61NLP25636A/IS61NVP25636A
IS61NLP51218A/IS61NVP51218A
119-PIN PBGA PACKAGE CONFIGURATION
Note:
PIN DESCRIPTIONS
Integrated Silicon Solution, Inc. — www.issi.com —
Rev. G
07/28/2010
Symbol
A
A0, A1
ADV
WE
CLK
CKE
CE
CE2
CE2
BWx (x=a,b)
A0 and A1 are the two least significant bits(LSB) of the address field and set the internal burst counter if burst is desired.
M
C
D
F
G
H
N
R
A
B
E
P
T
U
J
K
L
Pin Name
Address Inputs
Synchronous Burst Address Inputs
Synchronous Burst Address Advance/
Load
Synchronous Read/Write Control
Input
Synchronous Clock
Clock Enable
Synchronous Chip Select
Synchronous Chip Select
Synchronous Chip Select
Synchronous Byte Write Inputs
V
V
V
V
V
DQb
DQb
DQb
DQb
NC
NC
NC
NC
NC
NC
NC
NC
DDQ
DDQ
DDQ
DDQ
DDQ
1
DQPb
TMS
DQb
DQb
DQb
DQb
CE2
V
NC
NC
NC
NC
NC
2
A
A
A
A
DD
MODE
BWb
V
V
V
V
NC
V
V
V
V
TDI
NC
A
A
A
A
SS
SS
SS
SS
SS
SS
3
SS
SS
1-800-379-4774
ADV
CKE
CLK
TCK
V
V
V
512K x 18 (TOP VIEW)
CE
WE
A
A
NC
OE
NC
NC
NC
A
4
DD
DD
DD
1
0
OE
ZZ
MODE
TCK, TDO
TMS, TDI
V
V
NC
DQa-DQb
DQPa-Pb
V
*
*
dd
SS
ddq
BWa
TDO
Vss
Vss
Vss
NC
Vss
Vss
Vss
Vss
Vss
NC
NC
A
A
A
A
5
Output Enable
Power Sleep Mode
Burst Sequence Selection
JTAG Pins
Power Supply
Ground
No Connect
Data Inputs/Outputs
Parity Data I/O
Output Power Supply
DQPa
DQa
DQa
CE2
DQa
DQa
V
NC
NC
NC
NC
NC
NC
A
A
A
DD
A
6
V
V
V
V
V
DQa
DQa
DQa
DQa
NC
NC
NC
NC
NC
NC
NC
ZZ
DDQ
DDQ
DDQ
DDQ
DDQ
7
7