SI1302DL-T1 Vishay/Siliconix, SI1302DL-T1 Datasheet - Page 7

• Manufacturer Part Number: SI1302DL-T1
• Description: MOSFET 30V 0.64A
• Manufacturer: Vishay/Siliconix

Specifications of SI1302DL-T1

• Product Category: MOSFET
• Transistor Polarity: N-Channel
• Drain-source Breakdown Voltage: 30 V
• Gate-source Breakdown Voltage: +/- 20 V
• Continuous Drain Current: 0.6 A
• Resistance Drain-source Rds (on): 0.48 Ohms
• Configuration: Single
• Maximum Operating Temperature: + 150 C
• Mounting Style: SMD/SMT
• Package / Case: SC-70-3
• Fall Time: 8 ns
• Minimum Operating Temperature: - 55 C
• Power Dissipation: 310 mW
• Rise Time: 8 ns
• Factory Pack Quantity: 3000
• Tradename: TrenchFET
• Typical Turn-off Delay Time: 8 ns

AN813
Vishay Siliconix
THERMAL PERFORMANCE
Junction-to-Foot Thermal Resistance
(the Package Performance)
Thermal performance for the 3-pin SC-70 measured as
junction-to-foot thermal resistance is 285_C/W typical,
340_C/W maximum. Junction-to-foot thermal resistance for
the 6-pin SC70-6 is 105_C/W typical, 130_C/W maximum —
a nearly two-thirds reduction compared with the 3-pin device.
The “foot” is the drain lead of the device as it connects with the
body. This improved performance is obtained by the increase
in drain leads from one to four on the 6-pin SC-70. Note that
these numbers are somewhat higher than other LITTLE FOOT
devices due to the limited thermal performance of the Alloy 42
lead-frame compared with a standard copper lead-frame.
Junction-to-Ambient Thermal Resistance
(dependent on PCB size)
The typical Rθ
state, compared with 180_C/W for the 6-pin SC-70. Maximum
ratings are 430_C/W for the 3-pin device versus 220_C/W for
the 6-pin device. All figures are based on the 1-inch square
FR4 test board.The following table shows how the thermal
resistance impacts power dissipation for the two different
pin-outs at two different ambient temperatures.
www.vishay.com
2
SC-70 (3-PIN)
FIGURE 3.
Room Ambient 25 _C
P
P
P
400
320
240
160
80
D
D
D
10
0
+
+ 150
+ 347 mW
-5
T
10
J(max)
JA
360
-4
Rq
o
for the single 3-pin SC-70 is 360_C/W steady
C * 25
Comparison of SC70-3 and SC70-6 on EVB
o
JA
* T
C W
10
-3
A
o
C
10
-2
Time (Secs)
10
3-pin
-1
Elevated Ambient 60 _C
0.5 in x 0.6 in EVB
P
P
P
D
D
D
1
+
+ 150
+ 250 mW
10
6-pin
T
J(max)
360
Rq
o
C * 60
100
o
JA
* T
C W
A
o
1000
C
NOTE: Although they are intended for low-power applications,
devices in the 6-pin SC-70 will handle power dissipation in
excess of 0.5 W.
Testing
To aid comparison further, Figures 3 and 4 illustrate
single-channel SC-70 thermal performance on two different
board sizes and two different pad patterns. The results display
the thermal performance out to steady state and produce a
graphic account of the thermal performance variation between
the two packages. The measured steady state values of Rθ
for the single 3-pin and 6-pin SC-70 are as follows:
The results show that designers can reduce thermal
resistance Rθ
device rather than the 3-pin device. In this example, a 80_C/W
reduction was achieved without an increase in board area. If
increasing board size is an option, a further 118_C/W reduction
could be obtained by utilizing a 1-inch square PCB area.
SC-70 (6-PIN)
LITTLE FOOT SC-70
1) Minimum recommended pad pattern
(see Figure 4) on the EVB.
2) Industry standard 1” square PCB with
maximum copper both sides.
FIGURE 4.
Room Ambient 25 _C
P
P
P
400
320
240
160
D
D
D
80
0
10
+
+ 150
+ 694 mW
-5
T
10
J(max)
JA
180
-4
Rq
o
on the order of 20% simply by using the 6-pin
C * 25
Comparison of SC70-3 and SC70-6 on 1”
Square FR4 PCB
o
JA
* T
C W
10
-3
A
o
C
10
-2
Time (Secs)
10
3-pin
-1
Elevated Ambient 60 _C
1” Square FR4 PCB
410.31_C/W
P
P
P
360_C/W
1
3-Pin
D
D
D
Document Number: 71236
+
+ 150
+ 500 mW
10
6-pin
T
J(max)
180
Rq
o
C * 60
100
o
329.7_C/W
211.8_C/W
JA
* T
C W
6-Pin
12-Dec-03
1000
A
o
C
JA