AT25DF161-MH-Y Atmel, AT25DF161-MH-Y Datasheet - Page 13

IC FLASH 16MBIT 100MHZ 8UDFN

AT25DF161-MH-Y

Manufacturer Part Number
AT25DF161-MH-Y
Description
IC FLASH 16MBIT 100MHZ 8UDFN
Manufacturer
Atmel
Datasheet

Specifications of AT25DF161-MH-Y

Format - Memory
FLASH
Memory Type
DataFLASH
Memory Size
16M (2M x 8)
Speed
100MHz
Interface
SPI, RapidS
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-UDFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT25DF161-MH-Y
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
3687E–DFLASH–11/10
8.3
Figure 8-3.
Figure 8-4.
Block Erase
A block of 4-, 32-, or 64-Kbytes can be erased (all bits set to the logical “1” state) in a single operation by using one of
three different opcodes for the Block Erase command. An opcode of 20h is used for a 4-Kbyte erase, an opcode of 52h is
used for a 32-Kbyte erase, and an opcode of D8h is used for a 64-Kbyte erase. Before a Block Erase command can be
started, the Write Enable command must have been previously issued to the device to set the WEL bit of the Status
Register to a logical “1” state.
To perform a Block Erase, the CS pin must first be asserted and the appropriate opcode (20h, 52h, or D8h) must be
clocked into the device. After the opcode has been clocked in, the three address bytes specifying an address within the 4-
, 32-, or 64-Kbyte block to be erased must be clocked in. Any additional data clocked into the device will be ignored. When
the CS pin is deasserted, the device will erase the appropriate block. The erasing of the block is internally self-timed and
should take place in a time of t
Since the Block Erase command erases a region of bytes, the lower order address bits do not need to be decoded by the
device. Therefore, for a 4-Kbyte erase, address bits A11-A0 will be ignored by the device and their values can be either a
logical “1” or “0”. For a 32-Kbyte erase, address bits A14-A0 will be ignored, and for a 64-Kbyte erase, address bits
A15-A0 will be ignored by the device. Despite the lower order address bits not being decoded by the device, the
complete three address bytes must still be clocked into the device before the CS pin is deasserted, and the CS pin must be
deasserted on an even byte boundary (multiples of eight bits); otherwise, the device will abort the operation and no erase
operation will be performed.
SCK
SCK
SOI
SOI
CS
CS
SI
SI
Dual-Input Byte Program
Dual-Input Page Program
BLKE
.
Atmel AT25DF161
13

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