CY7C1393CV18-250BZXC Cypress Semiconductor Corp, CY7C1393CV18-250BZXC Datasheet - Page 9

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CY7C1393CV18-250BZXC

Manufacturer Part Number
CY7C1393CV18-250BZXC
Description
IC SRAM 18MBIT 250MHZ 165LFBGA
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY7C1393CV18-250BZXC

Format - Memory
RAM
Memory Type
SRAM - Synchronous, DDR II
Memory Size
18M (1M x 18)
Speed
250MHz
Interface
Parallel
Voltage - Supply
1.7 V ~ 1.9 V
Operating Temperature
0°C ~ 70°C
Package / Case
165-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY7C1393CV18-250BZXC
Manufacturer:
Cypress Semiconductor Corp
Quantity:
10 000
synchronized to the output clock of the DDR-II. In the single clock
mode, CQ is generated with respect to K and CQ is generated
with respect to K. The timing for the echo clocks is shown in
Switching Characteristics
DLL
These chips use a Delay Lock Loop (DLL) that is designed to
function between 120 MHz and the specified maximum clock
frequency. During power up, when the DOFF is tied HIGH, the
Application Example
Figure 1
Document #: 001-07162 Rev. *C
MASTER
ASIC)
BUS
(CPU
or
shows four DDR-II SIO used in an application.
SRAM 1 Input CQ#
SRAM 4 Input CQ#
SRAM 1 Input CQ
SRAM 4 Input CQ
Delayed K#
DATA OUT
Delayed K
Source K#
Source K
DATA IN
Address
BWS#
R/W#
LD#
on page 23.
Vt
R
R
R = 50Ohms
D
A
LD
LD
#
#
R/W
R/W
Vt = V
#
#
SRAM 1
W
B
S
W
#
B
#
REF
Figure 1. Application Example
C C#
K
CQ#
CQ
ZQ
K#
Q
R = 250Ohms
DLL is locked after 1024 cycles of stable clock. The DLL can also
be reset by slowing or stopping the input clocks K and K for a
minimum of 30 ns. However, it is not necessary to reset the DLL
to lock it to the desired frequency. The DLL automatically locks
1024 clock cycles after a stable clock is presented. The DLL may
be disabled by applying ground to the DOFF pin. When the DLL
is turned off, the device behaves in DDR-I mode (with one cycle
latency and a longer access time). For information refer to the
application note DLL Considerations in QDRII™/DDRII.
CY7C1392CV18, CY7C1992CV18
CY7C1393CV18, CY7C1394CV18
D
A
R
Vt
Vt
LD
#
R/W
SRAM 4
#
W
B
S
#
C C# K
CQ#
CQ
ZQ
K#
Q
R = 250Ohms
Page 9 of 30
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