C8051F347-GMR Silicon Labs, C8051F347-GMR Datasheet - Page 138
C8051F347-GMR
Manufacturer Part Number
C8051F347-GMR
Description
8-bit Microcontrollers - MCU 25 MIPS 32KB 10 ADC
Manufacturer
Silicon Labs
Datasheet
1.C8051F349-GMR.pdf
(276 pages)
Specifications of C8051F347-GMR
Rohs
yes
Core
8051
Data Bus Width
8 bit
Processor Series
C8051
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C8051F340/1/2/3/4/5/6/7/8/9/A/B/C/D
14.4. 4x Clock Multiplier
The 4x Clock Multiplier allows a 12 MHz oscillator to generate the 48 MHz clock required for Full Speed
USB communication (see
the Multiplier output can also be used as the system clock. C8051F340/1/2/3 devices can use the 48 MHz
Clock Multiplier output as system clock. See Table 3.1, “Global DC Electrical Characteristics,” on page 25
for system clock frequency specifications. See
source selection.
The 4x Clock Multiplier is configured via the CLKMUL register. The procedure for configuring and enabling
the 4x Clock Multiplier is as follows:
Important Note: When using an external oscillator as the input to the 4x Clock Multiplier, the exter-
nal source must be enabled and stable before the Multiplier is initialized. See
details on selecting an external oscillator source.
138
Bit7:
Bit6:
Bit5:
Bits4–2: Unused. Read = 000b; Write = don’t care.
Bits1–0: MULSEL: Clock Multiplier Input Select
MULEN
R/W
Bit7
1. Reset the Multiplier by writing 0x00 to register CLKMUL.
2. Select the Multiplier input source via the MULSEL bits.
3. Enable the Multiplier with the MULEN bit (CLKMUL | = 0x80).
4. Delay for >5 µs.
5. Initialize the Multiplier with the MULINIT bit (CLKMUL | = 0xC0).
6. Poll for MULRDY => ‘1’.
MULEN: Clock Multiplier Enable
0: Clock Multiplier disabled.
1: Clock Multiplier enabled.
MULINIT: Clock Multiplier Initialize
This bit should be a ‘0’ when the Clock Multiplier is enabled. Once enabled, writing a ‘1’ to
this bit will initialize the Clock Multiplier. The MULRDY bit reads ‘1’ when the Clock Multiplier
is stabilized.
MULRDY: Clock Multiplier Ready
This read-only bit indicates the status of the Clock Multiplier.
0: Clock Multiplier not ready.
1: Clock Multiplier ready (locked).
These bits select the clock supplied to the Clock Multiplier.
MULINIT MULRDY
R/W
Bit6
SFR Definition 14.5. CLKMUL: Clock Multiplier Control
MULSEL
00
01
10
11
Section “16.4. USB Clock Configuration” on page 166
Bit5
R
R/W
Bit4
-
External Oscillator / 2
External Oscillator
Internal Oscillator
Selected Clock
RESERVED
Section 14.5
Rev. 1.3
R/W
Bit3
-
for details on system clock and USB clock
R/W
Bit2
-
R/W
Bit1
MULSEL
). A divided version of
R/W
Bit0
Section 14.5
SFR Address
00000000
Reset Value
0xB9
for
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