MCIMX6U6AVM08AB Freescale Semiconductor, MCIMX6U6AVM08AB Datasheet - Page 123

• Manufacturer Part Number: MCIMX6U6AVM08AB
• Description: Processors - Application Specialized i.MX6 DualLite
• Manufacturer: Freescale Semiconductor
• Type: Automotive and Infotainment Processorsr

Specifications of MCIMX6U6AVM08AB

• Rohs: yes
• Core: ARM Cortex A9
• Processor Series: i.MX6
• Data Bus Width: 64 bit
• Maximum Clock Frequency: 800 MHz
• Instruction / Data Cache Memory: 32 KB
• Data Ram Size: 128 KB
• Data Rom Size: 96 KB
• Operating Supply Voltage: 1.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Package / Case: BGA 2240
• Interface Type: I2S, SSI, AC97, ESAI, UARTS, eCSPI, I2C, Ethernet, PWM, SJC, GPIO, KPP, SPDIF
• Memory Type: DDR3
• Minimum Operating Temperature: - 40 C
• Number Of Timers: 2

4.11.14.2 MediaLB (MLB) Controller AC Timing Electrical Specifications
This section describes the timing electrical information of the MediaLB module.
timing of MediaLB 3-pin interface, and
characteristics.
Ground = 0.0 V; Load Capacitance = 60 pF; MediaLB speed = 256/512 Fs; Fs = 48 kHz; all timing
parameters specified from the valid voltage threshold as listed below; unless otherwise noted.
Freescale Semiconductor
1
2
3
4
Differential clock input:
Differential signal/data input:
Signal-ended input voltage
(steady-state):
• logic low steady-state
• logic high steady-state
• hysteresis
• logic low steady-state
• logic high steady-state
• MLBSP, MLBDP
• MLBSN, MLBDN
The signal-ended output voltage of a driver is defined as V
output voltage of a driver is defined as V
Variations in the common-mode voltage can occur between logic states (for example, during state transitions)
as a result of differences in the transition rate of V
Short circuit current is applicable when V
The logic state of the receiver is undefined when -50 mV < V
Parameter
i.MX 6Solo/6DualLite Automotive and Infotainment Applications Processors, Rev. 1
Table 79. MediaLB 6-Pin Interface Electrical DC Specifications (continued)
Symbol
V
V
V
V
V
V
V
HSC
Figure 86. MediaLB 3-Pin Timing
IHC
IHS
ILC
ILS
IN+
IN-
Table 80
O-
O+
on MLBCN, MLBSN, and MLBDN.
and V
Test Conditions
O-
O+
and
See Note
are shorted together and/or shorted to ground.
and V
—
—
Table 81
O+
O-
4
on MLBCP, MLBSP, and MLBDP. The signal-ended
.
ID
< 50 mV.
lists the MediaLB 3-pin interface timing
Min
-25
0.5
0.5
50
50
Max
Figure 86
-50
-50
2.0
2.0
25
Electrical Characteristics
show the
Unit
mV
mV
mV
mV
mV
V
V
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