MCIMX6U6AVM08AB Freescale Semiconductor, MCIMX6U6AVM08AB Datasheet - Page 116

• Manufacturer Part Number: MCIMX6U6AVM08AB
• Description: Processors - Application Specialized i.MX6 DualLite
• Manufacturer: Freescale Semiconductor
• Type: Automotive and Infotainment Processorsr

Specifications of MCIMX6U6AVM08AB

• Rohs: yes
• Core: ARM Cortex A9
• Processor Series: i.MX6
• Data Bus Width: 64 bit
• Maximum Clock Frequency: 800 MHz
• Instruction / Data Cache Memory: 32 KB
• Data Ram Size: 128 KB
• Data Rom Size: 96 KB
• Operating Supply Voltage: 1.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Package / Case: BGA 2240
• Interface Type: I2S, SSI, AC97, ESAI, UARTS, eCSPI, I2C, Ethernet, PWM, SJC, GPIO, KPP, SPDIF
• Memory Type: DDR3
• Minimum Operating Temperature: - 40 C
• Number Of Timers: 2

Electrical Characteristics
4.11.12.4
4.11.12.5 MIPI D-PHY Switching Characteristics
116
F
P
t
t
t
—
t
t
t
t
t
t
ΔV
CDC
CPH
CPL
SKEW[PN]
SKEW[TX]
SETUP[RX]
HOLD[RX]
r
f
DDRCLK
DDRCLK
CMTX(HF)
Symbol
Static V
Δ
—
Dynamic V
V
V
V
V
V
V
V
V
V
V
OD
D N
DN
CM TX
D P
D N
C MTX
CM TX
D P
DP
(SE HS Signals)
Δ
Figure 73. Possible
Possible
CMT X
Maximum serial data rate (forward
direction)
DDR CLK frequency
DDR CLK period
DDR CLK duty cycle
DDR CLK high time
DDR CLK low time
DDR CLK / DATA Jitter
Intra-Pair (Pulse) skew
Data to Clock Skew
Data to Clock Receiver Setup time
Clock to Data Receiver Hold time
Differential output signal rise time
Differential output signal fall time
Common level variation above 450 MHz 80 Ω<= RL< = 125 Ω
Δ
i.MX 6Solo/6DualLite Automotive and Infotainment Applications Processors, Rev. 1
CMTX
(SE HS Signals)
(SE HS Signals)
Δ
V
V
VCMTX and
OD(0)
OD(0)
Parameters
Δ
Table 76. Electrical and Timing Information
Δ
Δ
VCMTX and
V
V
O D
Δ
OD
VOD Distortions of the Single-ended HS Signals
/2
/2
HS Line Drivers AC Specifications
Δ
VOD Distortions of the Single-ended HS Signals
On DATAP/N outputs.
80 Ω <= RL <= 125 Ω
On DATAP/N outputs.
80 Ω<= RL< = 125 Ω
t
20% to 80%, RL = 50 Ω
20% to 80%, RL = 50 Ω
CDC
Test Conditions
= t
CPH
/ P
DDRCLK
V
OD (1)
0.350
0.15
0.15
MIN
150
150
80
40
—
—
—
—
2
0.075
TYP
50
—
—
—
75
1
1
Freescale Semiconductor
0.650
0.3UI
0.3UI
MAX
1000
500
25
15
—
—
—
—
ps pk–pk
mV
Mbps
MHz
Unit
ns
UI
UI
UI
UI
UI
UI
ps
ps
%
rms