MCIMX6U6AVM08AB Freescale Semiconductor, MCIMX6U6AVM08AB Datasheet - Page 102

• Manufacturer Part Number: MCIMX6U6AVM08AB
• Description: Processors - Application Specialized i.MX6 DualLite
• Manufacturer: Freescale Semiconductor
• Type: Automotive and Infotainment Processorsr

Specifications of MCIMX6U6AVM08AB

• Rohs: yes
• Core: ARM Cortex A9
• Processor Series: i.MX6
• Data Bus Width: 64 bit
• Maximum Clock Frequency: 800 MHz
• Instruction / Data Cache Memory: 32 KB
• Data Ram Size: 128 KB
• Data Rom Size: 96 KB
• Operating Supply Voltage: 1.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Package / Case: BGA 2240
• Interface Type: I2S, SSI, AC97, ESAI, UARTS, eCSPI, I2C, Ethernet, PWM, SJC, GPIO, KPP, SPDIF
• Memory Type: DDR3
• Minimum Operating Temperature: - 40 C
• Number Of Timers: 2

Electrical Characteristics
4.11.10.2.3 Non-Gated Clock Mode
The timing is the same as the gated-clock mode (described in
Section 4.11.10.2.2, “Gated Clock
Mode,”)
except for the SENSB_HSYNC signal, which is not used (see
Figure
65). All incoming pixel clocks are
valid and cause data to be latched into the input FIFO. The SENSB_PIX_CLK signal is inactive (states
low) until valid data is going to be transmitted over the bus.
Start of Frame
nth frame
n+1th frame
SENSB_VSYNC
SENSB_PIX_CLK
SENSB_DATA[19:0]
invalid
invalid
1st byte
1st byte
Figure 65. Non-Gated Clock Mode Timing Diagram
The timing described in
Figure 65
is that of a typical sensor. Some other sensors may have a slightly
different timing. The CSI can be programmed to support rising/falling-edge triggered SENSB_VSYNC;
active-high/low SENSB_HSYNC; and rising/falling-edge triggered SENSB_PIX_CLK.
i.MX 6Solo/6DualLite Automotive and Infotainment Applications Processors, Rev. 1
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Freescale Semiconductor