E909.05A61DC ELMOS Semiconductor, E909.05A61DC Datasheet - Page 42

• Manufacturer Part Number: E909.05A61DC
• Description: Processors - Application Specialized Halios multipurpose sensor IC
• Manufacturer: ELMOS Semiconductor

Specifications of E909.05A61DC

• Rohs: yes
• Processor Series: EL16
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 8 MHz
• Data Ram Size: 3 kB
• Operating Supply Voltage: 2.25 V to 2.75 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: QFN-32
• Interface Type: I2C, SPI
• Memory Type: Flash, SRAM
• Minimum Operating Temperature: - 40 C
• Number Of Timers: 2

PRELIMINARY INFORMATION AUG 02, 2011
Table 6: Tnvh1
Register Tpgs (0x014)
Table 7: Tpgs
Register Tpgh (0x016)
Table 8: Tpgh
Register Trcv (0x018)
Table 9: Trcv
This document contains information on a pre-production product. ELMOS Semiconductor AG reserves the right to change specifications and information herein without notice.
ELMOS Semiconductor AG
Bit
Internal access
External access R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Bit Description
Bit
Reset value
Internal access
External access R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Bit Description
Bit
Reset value
Internal access
External access R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Bit Description
Bit
Reset value
Internal access
External access R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Bit Description
HALIOS® MULTI-PURPOSE OPTICAL SENSOR WITH HIGH LIGHT IMMUNITY
15
R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
time
0 or 1 - 8 system clock cycles (1us, when FSYS is 8 MHz)
2 - 2*8 system clock cycles
...
this register can only be written, when mode is not "main block read"
15
0
R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
time
0 or 1 - 8 system clock cycles (1us, when FSYS is 8 MHz)
2 - 2*8 system clock cycles
...
this register can only be written, when mode is not "main block read"
15
0
R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
time
0 or 1 - 8 system clock cycles (1us, when FSYS is 8 MHz)
2 - 2*8 system clock cycles
...
this register can only be written, when mode is not "main block read"
15
0
R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
time
0 or 1 - 8 system clock cycles (1us, when FSYS is 8 MHz)
2 - 2*8 system clock cycles
...
this register can only be written, when mode is not "main block read"
14
14
0
14
0
14
0
13
13
0
13
0
13
0
12
12
0
12
0
12
0
11
11
0
11
0
11
0
Data Sheet 42 / 67
10
10
0
10
0
10
0
9
9
0
9
0
9
0
8
8
0
8
0
8
0
7
7
0
7
0
7
0
6
6
0
6
0
6
0
5
5
0
5
0
5
0
4
4
0
4
0
4
0
QM-No.: 25DS0014E.00
3
3
1
3
0
3
0
2
2
1
2
0
2
0
E909.05
1
1
0
1
0
1
1
0
0
0
0
1
0
0