MCIMX6Q6AVT10AC Freescale Semiconductor, MCIMX6Q6AVT10AC Datasheet - Page 43
MCIMX6Q6AVT10AC
Manufacturer Part Number
MCIMX6Q6AVT10AC
Description
Processors - Application Specialized i.MX6Q
Manufacturer
Freescale Semiconductor
Type
Multimedia Applicationsr
Datasheet
1.MCIMX6Q6AVT10AC.pdf
(166 pages)
Specifications of MCIMX6Q6AVT10AC
Rohs
yes
Core
ARM Cortex A9
Processor Series
i.MX6
Data Bus Width
32 bit
Maximum Clock Frequency
1 GHz
Data Ram Size
16 KB
Operating Supply Voltage
1.05 V to 1.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
FCBGA
Interface Type
I2C, I2S, UART, USB
Memory Type
L1/L2 Cache, ROM, SRAM
Minimum Operating Temperature
- 40 C
Number Of Timers
2
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Price
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1
2
3
4.7.3
The differential output transition time waveform is shown in
Table 32
4.7.4
The differential output transition time waveform is shown in
Freescale Semiconductor
1
2
Single output slew rate, measured between
Vol(ac) and Voh(ac)
Skew between pad rise/fall asymmetry +
skew caused by SSN
Differential pulse skew
Transition Low to High Time
Transition High to Low Time
Operating Frequency
Offset voltage imbalance
Note that the JEDEC JESD79_3C specification supersedes any specification in this document.
Vid(ac) specifies the input differential voltage |Vtr-Vcp| required for switching, where Vtr is the “true” input signal and Vcp is
the “complementary” input signal. The Minimum value is equal to Vih(ac) – Vil(ac).
The typical value of Vix(ac) is expected to be about 0.5 OVDD. and Vix(ac) is expected to track variation of OVDD. Vix(ac)
indicates the voltage at which differential input signal must cross.
t
the negative going edge of the same channel.
Measurement levels are 20–80% from output voltage.
SKD
= | t
shows the AC parameters for LVDS I/O.
PHLD
LVDS I/O AC Parameters
MLB 6-Pin I/O AC Parameters
– t
Parameter
Parameter
PLHD
i.MX 6Dual/6Quad Automotive and Infotainment Applications Processors, Rev. 2
1
Table 31. DDR I/O DDR3/DDR3L Mode AC Parameters
VDIFF
|, is the magnitude difference in differential propagation delay time between the positive going edge and
padn
padp
Figure 6. Differential LVDS Driver Transition Time Waveform
2
2
20%
Table 32. I/O AC Parameters of LVDS Pad
Symbol
Symbol Test Condition
t
t
t
t
SKD
Vos
tsr
SKD
TLH
THL
0V (Differential)
t
f
VDIFF = {padp} - {padn}
TLH
80%
0V
Driver impedance =
Rload = 100 ,
Cload = 2 pF
Test Condition
clk = 533 MHz
—
—
34
Figure
Figure
80%
Min
—
—
—
—
—
6.
7.
Min
2.5
—
0V
0V
t
1
THL
20%
(continued)
Typ
600
—
—
—
—
Typ
—
—
V
V
Electrical Characteristics
OH
OL
Max
0.25
800
150
0.5
0.5
Max
0.1
5
Unit
MHz
mV
V/ns
Unit
ns
ns
43