XRT83SL216ES Exar, XRT83SL216ES Datasheet - Page 34

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XRT83SL216ES

Manufacturer Part Number
XRT83SL216ES
Description
Peripheral Drivers & Components - PCIs 16 CH E1 LIU SH
Manufacturer
Exar
Datasheet

Specifications of XRT83SL216ES

Product Category
Peripheral Drivers & Components - PCIs
Rohs
yes
XRT83SL216
16-CHANNEL E1 SHORT-HAUL LINE INTERFACE UNIT
(0
X
06
B
B
B
D7
D6
D5
D4
D3
D2
D1
D0
D7
D6
D5
D4
D3
D2
D1
D0
D7
D6
H
IT
IT
IT
, 0
X
09
H
Device "ID" The device for this chip consists of 2 read only registers. The ID for
ARAOS_n Automatic Receive All Ones
, 0
Revision
SRES_n
N
N
N
X
"ID"
AME
AME
0C
AME
T
ABLE
H
, 0
X
T
0F
The revision "ID" of the XRT83SL216 LIU is used to enable soft-
ware to identify which revision of silicon is currently being tested.
The revision "ID" for the first revision of silicon (Revision A) will be
0x01h.
10: M
the XR T83SL216 is 0x8004h.
Software Reset
Writing a "1" to this bit will cause the channel register to reset to
it's default value.
N
If ARAOS_n is selected, an all ones pattern will be sent to the
RPOS/RNEG outputs if the channel experiences an RLOS condi-
tion. If RLOS does not occur, ARAOS_n will remain inactive.
"0" = Disabled
"1" = Enabled
ABLE
OTE
H
T
, 0
C
ABLE
HANNEL
: This is a Write-Only bit.
X
ICROPROCESSOR
9: M
12
H
11: M
, 0
ICROPROCESSOR
D
C
X
EVICE
15
ONTROL
ICROPROCESSOR
H
R
, 0
EVISION
"ID" R
X
18
R
H
EGISTER
R
, 0
"ID" R
EGISTERS
EGISTERS
X
F
F
F
1B
UNCTION
UNCTION
UNCTION
R
EGISTER
32
H
EGISTER
(C
, 1E
R
HANNEL
EGISTER
(0
0
H
X
X
, 0
04
04
0
X
(0
H
21
X
_n, where n = 0:15)
H
X
03
& 0
03
H
& 0
B
, 0
H
H
IT
X
)
X
B
05
X
D
24
05
IT
H
ESCRIPTION
H
)
D
H
, 0
ESCRIPTION
B
X
IT
27
D
H
, 0
ESCRIPTION
X
2A
H
, 0
Register
Register
Register
Type
Type
Type
R/W
X
WO
RO
RO
2D
H
, 0
X
30
(HW reset)
(HW reset)
(HW reset)
REV. 1.0.0
H
Default
Default
Default
Value
Value
Value
, 0X33
X
0
0
0
0
0
0
0
1
0
H
)

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