XRT83SL216ES Exar, XRT83SL216ES Datasheet - Page 13

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XRT83SL216ES

Manufacturer Part Number
XRT83SL216ES
Description
Peripheral Drivers & Components - PCIs 16 CH E1 LIU SH
Manufacturer
Exar
Datasheet

Specifications of XRT83SL216ES

Product Category
Peripheral Drivers & Components - PCIs
Rohs
yes
CONTROL FUNCTION
JTAG SECTION
REV. 1.0.0
JASEL0
JASEL1
MCLK
N
TRST
N
TDO
TMS
TCK
AME
TDI
AME
G13
H13
P
L6
P
G5
G4
G6
H5
H4
IN
IN
T
T
YPE
YPE
I
I
O
I
I
I
I
JTAG Test Clock input, Boundary Scan Clock input:
JTAG Test Data input, Boundary Scan Test Data Input:
N
JTAG Test Data output:
Boundary Scan Test Data Output:
JTAG Test Mode Select, Boundary Scan Test Mode Select input pin:
N
JTAG Test Mode Reset, Boundary Scan Mode Reset Input pin:
N
Jitter Attenuator Select:
The Jitter Attenuator can be slected to be in the Transmit or Receive path.
N
Master Clock Input
This pin is used as the internal reference to the LIU. This clock must be
2.048MHz +/-50ppm.
OTE
OTE
OTE
OTE
: Internally pulled "High" with a 50k
: Internally pulled "High" with a 50k
: This input pin should be pulled "Low" for normal operation. Internally
: Internally pulled "High" with a 50k
pulled "High" with a 50k
16-CHANNEL E1 SHORT-HAUL LINE INTERFACE UNIT
JASEL1
11
0
0
1
1
JASEL0
0
1
0
1
D
D
resistor.
ESCRIPTION
ESCRIPTION
Jitter Attenuator State
JA Select is enabled
through µP Control
resistor.
resistor.
resistor.
JA in Rx Path
JA in Tx Path
JA Disabled
XRT83SL216

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