XRT83SL216ES Exar, XRT83SL216ES Datasheet - Page 21

• Manufacturer Part Number: XRT83SL216ES
• Description: Peripheral Drivers & Components - PCIs 16 CH E1 LIU SH
• Manufacturer: Exar

Specifications of XRT83SL216ES

• Product Category: Peripheral Drivers & Components - PCIs
• Rohs: yes

REV. 1.0.0
The transmit path consists of 16 independent E1 transmitters. The following section describes the complete
transmit path from TCLK/TPOS/TNEG inputs to TTIP/TRING outputs. A simplified block diagram of the
transmit path is shown in
In dual rail mode, TPOS and TNEG are the digital inputs for the transmit path. In single rail mode, TNEG can
be tied to ground. The XRT83SL216 can be programmed to sample the inputs on either edge of TCLK. By
default, data is sampled on the falling edge of TCLK. To sample data on the rising edge of TCLK, set TCLKinv
to "1" in the appropriate global register.
falling edge of TCLK.
TCLK. The timing specifications are shown in
F
F
F
2.0 TRANSMIT PATH LINE INTERFACE
2.1
IGURE
IGURE
IGURE
TCLK
TPOS
TNEG
11. T
12. T
10. S
TCLK/TPOS/TNEG Digital Inputs
RANSMIT
RANSMIT
IMPLIFIED
Encoder
HDB3
TPOS
TNEG
TCLK
D
D
Figure 12
TPOS
TNEG
TCLK
or
B
or
ATA
ATA
LOCK
Figure
S
S
AMPLED ON
AMPLED ON
D
IAGRAM OF THE
10.
is a timing diagram of the transmit input data sampled on the rising edge of
Attenuator
Tx Jitter
Figure 11
F
R
ALLING
ISING
Table
T
E
T
T
RANSMIT
SU
SU
is a timing diagram of the transmit input data sampled on the
E
DGE OF
16-CHANNEL E1 SHORT-HAUL LINE INTERFACE UNIT
Control
Timing
DGE OF
2.
19
TCLK
P
T
T
TCLK
ATH
HO
HO
TCLK
TCLK
Tx Pulse Shaper
F
R
TCLK
TCLK
R
F
Line Driver
XRT83SL216
TTIP
TRING