74ABT16374CSSC_Q Fairchild Semiconductor, 74ABT16374CSSC_Q Datasheet
74ABT16374CSSC_Q
Specifications of 74ABT16374CSSC_Q
Related parts for 74ABT16374CSSC_Q
74ABT16374CSSC_Q Summary of contents
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... O –O 3-STATE Outputs 0 15 © 2005 Fairchild Semiconductor Corporation Features Separate control logic for each byte 16-bit version of the ABT374 Edge-triggered D-type inputs Buffered Positive edge-triggered clock High impedance glitch free bus loading during entire power up and power down cycle ...
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Functional Description The ABT16374 consists of sixteen edge-triggered flip-flops with individual D-type inputs and 3-STATE true outputs. The device is byte controlled with each byte functioning identically, but independent of the other. The control pins can be shorted together to ...
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Absolute Maximum Ratings Storage Temperature Ambient Temperature under Bias Junction Temperature under Bias V Pin Potential to Ground Pin CC Input Voltage (Note 2) Input Current (Note 2) Voltage Applied to Any Output in the Disabled or Power-Off State ...
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AC Electrical Characteristics (SSOP Package) Symbol Parameter f Maximum Clock Frequency MAX t Propagation Delay PLH PHL n t Output Enable Time PZH t PZL t Output Disable Time PHZ t PLZ AC Operating Requirements Symbol ...
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Physical Dimensions inches (millimeters) unless otherwise noted 48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide Package Number MS48A 5 www.fairchildsemi.com ...
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves ...