IDT74ALVCH32501BFG8 IDT, Integrated Device Technology Inc, IDT74ALVCH32501BFG8 Datasheet - Page 3

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IDT74ALVCH32501BFG8

Manufacturer Part Number
IDT74ALVCH32501BFG8
Description
IC UNIV BUS TXRX 26BIT 114LFBGA
Manufacturer
IDT, Integrated Device Technology Inc
Series
74ALVCHr
Datasheet

Specifications of IDT74ALVCH32501BFG8

Logic Type
Universal Bus Transceiver, CMOS
Number Of Circuits
36-Bit
Current - Output High, Low
24mA, 24mA
Voltage - Supply
2.3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
114-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
74ALVCH32501BFG8
PIN DESCRIPTION
NOTE:
1. These pins have "Bus-Hold". All other pins are standard inputs, outputs, or I/Os.
ABSOLUTE MAXIMUM RATINGS
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
2. V
3. All terminals except V
IDT74ALVCH32501
3.3V CMOS 36-BIT UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS
V
V
T
Symbol
I
I
I
I
I
CC
OUT
IK
OK
SS
Pin Names
TERM
TERM
STG
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
CC
CLKAB
CLKBA
OEAB
OEBA
LEAB
LEBA
x A x
x B x
terminals.
(2)
(3)
Terminal Voltage with Respect to GND
Terminal Voltage with Respect to GND
Storage Temperature
DC Output Current
Continuous Clamp Current,
V
Continuous Clamp Current, V
Continuous Current through each
V
I
CC
< 0 or V
or GND
A-to-B Output Enable Input
B-to-A Output Enable Input (Active LOW)
A-to-B Latch Enable Input
B-to-A Latch Enable Input
A-to-B Clock Input
B-to-A Clock Input
A-to-B Data Inputs or B-to-A 3-State Outputs
B-to-A Data Inputs or A-to-B 3-State Outputs
I
CC
> V
Description
.
CC
Description
O
< 0
–0.5 to V
–0.5 to +4.6
–65 to +150
–50 to +50
±100
Max
±50
–50
CC
+0.5
(1)
(1)
(1)
Unit
mA
mA
mA
mA
° C
V
V
3
FUNCTION TABLE
CAPACITANCE
NOTE:
1. As applicable to the device type.
NOTES:
1. H = HIGH Voltage Level
2. A-to-B data flow is shown.
3. Output level before the indicated steady-state conditions were established.
4. Output level before the indicated steady-state conditions were established, provided
C
Symbol
C
C
L = LOW Voltage Level
X = Don’t Care
Z = High Impedance
↑ = LOW-to-HIGH Transition
CLKBA.
that CLKAB was HIGH before LEAB went LOW.
IN
OUT
I/O
OEAB
H
H
H
H
H
H
L
Input Capacitance
Output Capacitance
I/O Port Capacitance
Parameter
LEAB
H
H
X
L
L
L
L
Inputs
(1)
B-to-A data flow is similar but uses OEBA, LEBA, and
CLKAB
(T
A
H
X
X
X
L
INDUSTRIAL TEMPERATURE RANGE
= +25°C, F = 1.0MHz)
Conditions
V
V
(EACH FLIP-FLOP)
V
OUT
IN
IN
= 0V
= 0V
= 0V
xAx
H
H
X
X
X
L
L
Typ.
5
7
7
(1,2)
Max.
Outputs
7
9
9
xBx
B
B
H
H
Z
L
L
(3)
(4)
Unit
pF
pF
pF

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