73S1217F-68MR/F/PE Maxim Integrated, 73S1217F-68MR/F/PE Datasheet - Page 25
73S1217F-68MR/F/PE
Manufacturer Part Number
73S1217F-68MR/F/PE
Description
8-bit Microcontrollers - MCU
Manufacturer
Maxim Integrated
Datasheet
1.73S1217F-68MRFPE.pdf
(140 pages)
Specifications of 73S1217F-68MR/F/PE
Rohs
yes
Core
80515
Data Bus Width
8 bit
Part # Aliases
90-W1217+TF5
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MPU Clock Control Register (MPUCKCtl): 0xFFA1
The oscillator circuits are designed to connect directly to standard parallel resonant crystal in a Pierce
oscillator configuration. Each side of the crystal should include a 22pF capacitor to ground for both
oscillator circuits and a 1MΩ resistor is required across the 12MHz crystal.
The CPU clock is available as an output on pin CPUCLK.
Rev. 1.2
MPUCKCtl.7
MPUCKCtl.6
MPUCKCtl.5
MPUCKCtl.4
MPUCKCtl.3
MPUCKCtl.2
MPUCKCtl.1
MPUCKCtl.0
Note: The crystals should be placed as close as possible to the IC, and vias should be avoided.
Bit
MSB
–
22pF
Symbol
MDIV.5
MDIV.4
MDIV.3
MDIV.2
MDIV.1
MDIV.0
–
–
–
12MHz
1MΩ
This value determines the ratio of the MPU master clock frequency to
the VCO frequency (MCLK) such that
MPUClk = MCLK/(2 * (MPUCKDiv(5:0) + 1)).
Do not use values of 0 or 1 for MPUCKDiv(n).
Default is 0Ch to set CPCLK = 3.6923MHz.
MDIV.5 MDIV.4 MDIV.3 MDIV.2 MDIV.1 MDIV.0
Table 13: The MPUCKCtl Register
Figure 4: Oscillator Circuit
22pF
73S1217F
22pF
0x0C
Function
32KHz
22pF
LSB
25
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