CY7C68034-56LTXI Cypress Semiconductor, CY7C68034-56LTXI Datasheet - Page 36

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CY7C68034-56LTXI

Manufacturer Part Number
CY7C68034-56LTXI
Description
USB Interface IC EZ-USB NX2LP-Flex Flash Controller
Manufacturer
Cypress Semiconductor
Datasheet

Specifications of CY7C68034-56LTXI

Rohs
yes
Product
USB 2.0
Data Rate
96 Mbps
Interface Type
I2C
Operating Supply Voltage
3.3 V
Operating Supply Current
43 mA
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
QFN-56
Minimum Operating Temperature
- 40 C
PCB Layout Recommendations
Follow these recommendations
performance operation:
Document Number: 001-04247 Rev. *J
Note
29. Source for recommendations:
At least a four-layer impedance controlled boards is
recommended to maintain signal quality.
Specify impedance targets (ask your board vendor what they
can achieve) to meet USB specifications.
To control impedance, maintain trace widths and trace spacing.
Minimize any stubs to avoid reflected signals.
Connections between the USB connector shell and signal
ground must be done near the USB connector.
Bypass/flyback caps on VBUS, near connector, are
recommended.
DPLUS and DMINUS trace lengths should be kept to within
2 mm of each other in length, with preferred length of
20–30 mm.
Maintain a solid ground plane under the DPLUS and DMINUS
traces. Do not allow the plane to be split under these traces.
No vias should be placed on the DPLUS or DMINUS trace
routing unless absolutely necessary.
Isolate the DPLUS and DMINUS traces from all other signal
traces as much as possible.
EZ-USB FX2™PCB Design Recommendations
[29]
to ensure reliable high
and
High Speed USB Platform Design
Quad Flat Package No Leads (QFN) Package
Design Notes
Electrical contact of the part to the printed circuit board (PCB) is
made by soldering the leads on the bottom surface of the
package to the PCB. Therefore, special attention is required to
the heat transfer area below the package to provide a good
thermal bond to the circuit board. Design a copper (Cu) fill into
the PCB as a thermal pad under the package. Heat is transferred
from the NX2LP-Flex to the PCB through the device’s metal
paddle on the bottom side of the package. It is then conducted
from the PCB’s thermal pad to the inner ground plane by a
5 × 5 array of vias. A via is a plated through hole in the PCB with
a finished diameter of 13 mil. The QFN’s metal die paddle must
be soldered to the PCB’s thermal pad. Solder mask is placed on
the board top side over each via to resist solder flow into the via.
The mask on the top side also minimizes outgassing during the
solder reflow process.
For further information on this package design, refer to the
application note
Amkor’s Eutectic and Lead-Free CSP
Scale
information on board mounting guidelines, soldering flow, rework
process, and so on.
Packages. This application note provides detailed
Application Note for Surface Mount Assembly of
CY7C68033/CY7C68034
Guidelines.
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™ Wafer Level Chip
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