AT45DB161E-SSHF-T Adesto Technologies, AT45DB161E-SSHF-T Datasheet - Page 28

• Manufacturer Part Number: AT45DB161E-SSHF-T
• Description: Flash 16M 2.3-3.6V 85Mhz Serial Flash
• Manufacturer: Adesto Technologies

Specifications of AT45DB161E-SSHF-T

• Data Bus Width: 8 bit
• Memory Type: Data Flash
• Memory Size: 16 Mbit
• Architecture: Flexible, Uniform Erase
• Timing Type: Synchronous
• Interface Type: SPI
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 2.3 V
• Maximum Operating Current: 26 mA
• Operating Temperature: - 40 C to + 85 C
• Mounting Style: SMD/SMT
• Package / Case: SOIC-8

9.4
Table 9-1.
Note:
Bit
5:2
7
6
1
0
PROTECT
RDY/BUS
DENSITY
program the data from the buffer back into same page of main memory. The operation is internally self-timed and should
take place in a maximum time of t
If a sector is programmed or reprogrammed sequentially page by page and the possibility does not exist that there will be
a page or pages of static data, then the programming algorithm shown in
Otherwise, if there is a chance that there may be a page or pages of a sector that will contain static data, then the
programming algorithm shown in
Please contact Adesto for availability of devices that are specified to exceed the 20,000 cycle cumulative limit.
Status Register Read
The 2-byte Status Register can be used to determine the device's ready/busy status, page size, a Main Memory Page to
Buffer Compare operation result, the sector protection status, Freeze Sector Lockdown status, erase/program error
status, Program/Erase Suspend status, and the device density. The Status Register can be read at any time, including
during an internally self-timed program or erase operation.
To read the Status Register, the CS pin must first be asserted and then the opcode D7h must be clocked into the device.
After the opcode has been clocked in, the device will begin outputting Status Register data on the SO pin during every
subsequent clock cycle. After the second byte of the Status Register has been clocked out, the sequence will repeat
itself, starting again with the first byte of the Status Register, as long as the CS pin remains asserted and the clock pin is
being pulsed. The data in the Status Register is constantly being updated, so each repeating sequence may output new
data. The RDY/BUSY status is available for both bytes of the Status Register and is updated for each byte.
Deasserting the CS pin will terminate the Status Register Read operation and put the SO pin into a high-impedance
state. The CS pin can be deasserted at any time and does not require that a full byte of data be read.
1. R = Readable only
COMP
PAGE
SIZE
Y
Status Register Format – Byte 1
Ready/Busy Status
Compare Result
Density Code
Sector Protection Status
Page Size Configuration
Name
Figure 26-2 on page 62
EP
. During this time, the RDY/BUSY Status Register will indicate that the part is busy.
Type
R
R
R
R
R
1)
(
Description
101
0
1
0
1
1
0
1
0
1
Device is busy with an internal operation.
Device is ready.
Main memory page data matches buffer data.
Main memory page data does not match buffer data.
16-Mbit
Sector protection is disabled.
Sector protection is enabled.
Device is configured for standard DataFlash page size (528 bytes).
Device is configured for “power of 2” binary page size (512 bytes).
is recommended.
Adesto AT45DB161E [DATASHEET]
Figure 26-1 on page 61
8782D–DFLASH–11/2012
is recommended.
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