AT25DL081-SSHN-T Adesto Technologies, AT25DL081-SSHN-T Datasheet - Page 38

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AT25DL081-SSHN-T

Manufacturer Part Number
AT25DL081-SSHN-T
Description
Flash 8M 1.65-1.95V 100Mhz Serial Flash
Manufacturer
Adesto Technologies
Datasheet

Specifications of AT25DL081-SSHN-T

Rohs
yes
Data Bus Width
8 bit
Memory Type
Flash
Memory Size
8 Mbit
Architecture
Flexible, Uniform Erase
Timing Type
Synchronous
Interface Type
SPI
Supply Voltage - Max
1.95 V
Supply Voltage - Min
1.65 V
Maximum Operating Current
20 mA
Operating Temperature
- 40 C to + 85 C
Mounting Style
SMD/SMT
Package / Case
SOIC-8
11.1.6 RSTE Bit
11.1.7 SLE Bit
11.1.8 PS Bit
11.1.9 ES Bit
11.1.10 RDY/BSY Bit
The RSTE bit is used to enable or disable the Reset command. When the RSTE bit is in the Logical 0 state (the default
state after power-up), the Reset command is disabled and any attempts to reset the device using the Reset command
will be ignored. When the RSTE bit is in the Logical 1 state, the Reset command is enabled.
The RSTE bit will retain its state as long as power is applied to the device. Once set to the Logical 1 state, the RSTE bit
will remain in that state until it is modified using the Write Status Register Byte 2 command or until the device has been
power cycled. The Reset command itself will not change the state of the RSTE bit.
The SLE bit is used to enable and disable the Sector Lockdown and Freeze Sector Lockdown State commands. When
the SLE bit is in the Logical 0 state (the default state after power-up), the Sector Lockdown and Freeze Sector Lockdown
commands are disabled. If the Sector Lockdown and Freeze Sector Lockdown commands are disabled, then any
attempts to issue the commands will be ignored. This provides a safeguard for these commands against accidental or
erroneous execution. When the SLE bit is in the Logical 1 state, the Sector Lockdown and Freeze Sector Lockdown
State commands are enabled.
Unlike the WEL bit, the SLE bit does not automatically reset after certain device operations. Therefore, once set, the SLE
bit will remain in the Logical 1 state until it is modified using the Write Status Register Byte 2 command or until the device
has been power cycled. The Reset command has no effect on the SLE bit.
If the Freeze Sector Lockdown State command has been issued, then the SLE bit will be permanently reset in the
Logical 0 state to indicate that the Sector Lockdown command has been disabled.
The PS bit indicates whether or not a sector is in the Program Suspend state.
The ES bit indicates whether or not a sector is in the Erase Suspend state.
The RDY/BSY bit is used to determine whether or not an internal operation, such as a program or erase, is in progress.
To poll the RDY/BSY bit to detect the completion of a program or erase cycle, new Status Register data must be
continually clocked out of the device until the state of the RDY/BSY bit changes from a Logical 1 to a Logical 0.
Figure 11-1. Read Status Register
SCK
SO
CS
SI
MSB
High-impedance
0
0
0
1
0
2
Opcode
0
3
0
4
1
5
0
6
1
7
MSB
D
8
D
9
Status Register
D
10 11
Byte 1
D
D
12
D
13 14
D
D
15 16
MSB
D
D
17
Status Register
D
18
Byte 2
D
19
D
20
D
21 22
D
D
23 24
MSB
AT25DL081 [DATASHEET]
D
D
25
Status Register
D
26
Byte 1
D
27
D
28 29
8732E–DFLASH–1/2013
D
D
30
D
38

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