W5200 WIZnet, W5200 Datasheet - Page 42

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W5200

Manufacturer Part Number
W5200
Description
Ethernet ICs 3-IN-1 ENET CONTR TCP/IP+MAC+PHY
Manufacturer
WIZnet
Type
Embedded Systems using SPIr
Datasheet

Specifications of W5200

Rohs
yes
Product
Ethernet Controllers
Data Rate
10 Mb/s, 100 Mb/s
Supply Voltage - Max
3.63 V
Supply Voltage - Min
2.97 V
Maximum Operating Temperature
+ 85 C
Package / Case
QFN-48
Ethernet Connection Type
10Base-T, 100Base-TX, PPPoE
Maximum Power Dissipation
528 mW
Maximum Supply Current
5 uA
Minimum Operating Temperature
- 55 C
Standard Supported
802.3

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Set soc
This s
each
© Co
In c
{
gS0
bas
Sn_
gS0
me
gS1
gS1
gS2
gS2
gS3
gS3
gS4
gS4
gS5
gS5
gS6
gS6
gS7
gS7
gS0
bas
Sn_
gS0
/*
gS3
gS6
}
emory
0_RX_BASE =
_RXMEM_SIZE
0_RX_MASK =
1_RX_BASE =
1_RX_MASK =
2_RX_BASE =
2_RX_MASK =
3_RX_BASE =
3_RX_MASK =
4_RX_BASE =
4_RX_MASK =
5_RX_BASE =
5_RX_MASK =
6_RX_BASE =
6_RX_MASK =
7_RX_BASE =
7_RX_MASK =
0_TX_BASE =
_TXMEM_SIZE
0_TX_MASK =
3_TX_BASE,
6_TX_BASE, g
cket memor
stage sets th
case of, assi
se address of
se address of
opyright 201
socket are f
Same met
= gS0_RX_BAS
= gS1_RX_BAS
= gS2_RX_BAS
= gS3_RX_BAS
= gS4_RX_BAS
= gS5_RX_BAS
= gS6_RX_BAS
ry informatio
he socket tx/
= 0x0000(Chi
11WIZnet Co
fixed and sav
= 2K – 1;
= 2K – 1;
= 2K – 1;
= 2K – 1;
= 2K – 1;
= 2K – 1;
= 2K – 1;
= 2K – 1;
= 0x0000(Ch
= 2K – 1;
E(ch) = (uint
E(ch) = (uint
gS6_tx_MASK
gn 2KB rx, tx
f RX memory
f TX memory
thod, set
gS3_TX_MAS
//
t8 *) 2;
t8 *) 2;
SK, gS4_TX_
/rx memory
ved in this st
y for SOCKET
y for SOCKET
K, gS7_TX_BA
on
x memory pe
ip base addr
SE + (gS0_RX
SE + (gS1_RX
SE + (gS2_RX
SE + (gS3_RX
SE + (gS4_RX
SE + (gS5_RX
SE + (gS6_RX
o., Inc. All rig
0x07FF, for g
ip base add
gS1_TX_BAS
// A
// A
dress) + 0x80
X_MASK + 1);
X_MASK + 1);
X_MASK + 1);
X_MASK + 1);
X_MASK + 1);
X_MASK + 1);
X_MASK + 1);
T 0
T 0
Assign 2K rx
Assign 2K rx
SE, gS1_TX_
tage.
er SOCKET
ress) + 0xC0
getting offse
ASE, gS7_TX_
ghts reserve
BASE, gS4_T
information
000(Internal
et address w
TX_MASK, gS
ed.
000(InternalT
_MASK, gS2
. The base a
_MASK */
memory per
memory per
within assigne
address and m
2_TX_BASE,
S5_TX_BASE,
TX buffer ad
RX buffer a
SOCKET
SOCKET
address);
ed SOCKET 0
mask addres
ddress);
gS2_TX_MA
gS5_TX_MA
//
//
ASK,
0 RX
ASK,
ss of
Set
Set
42

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