W5200 WIZnet, W5200 Datasheet - Page 39

• Manufacturer Part Number: W5200
• Description: Ethernet ICs 3-IN-1 ENET CONTR TCP/IP+MAC+PHY
• Manufacturer: WIZnet
• Type: Embedded Systems using SPIr

Specifications of W5200

• Rohs: yes
• Product: Ethernet Controllers
• Data Rate: 10 Mb/s, 100 Mb/s
• Supply Voltage - Max: 3.63 V
• Supply Voltage - Min: 2.97 V
• Maximum Operating Temperature: + 85 C
• Package / Case: QFN-48
• Ethernet Connection Type: 10Base-T, 100Base-TX, PPPoE
• Maximum Power Dissipation: 528 mW
• Maximum Supply Current: 5 uA
• Minimum Operating Temperature: - 55 C
• Standard Supported: 802.3

Sn_RX_
(0xFE4
Sn_IMR
This
regist
0x462
0x462
It con
Sn_IM
set a
‘1’, I
signa
Bit
7
6
5
4
3
2
1
0
© Co
PRE
MR correspon
402B + 0xn0
R (Socket n-
2A, 0x472A)
2B, 0x472B)
ter, the user
nfigures the
ECV
opyright 201
_WR (Socke
7
7
s ‘1’, its cor
R(n) become
register offe
l is asserted
Ex) In cas
Symbol
PRECV
PFAIL
PNEXT
SENDOK
TIMEOUT
RECV
DISCON
CON
PF
et n-th RX W
e interrupt o
FAIL
00)][0x0000
T
r should read
11WIZnet Co
se of 2048(0x
nds to interr
es ‘1’. At thi
rresponding
ers the loca
6
6
later to get
th Interrupt
low)
first and lo
Descript
Sn_IR(PR
Valid on
Sn_IR(PF
Valid on
Sn_IR(PN
Valid on
Sn_IR(SE
Sn_IR(TI
Sn_IR(RE
Sn_IR(DI
Sn_IR(CO
PN
of Socket n-t
rupt bit of Sn
ation inform
d upper byte
ENDOK) Inter
t Mask Regis
RECV) Interru
FAIL) Interru
NEXT) Interru
ECV) Interrup
o., Inc. All rig
ower bytes
x0800) in S0_
ISCON) Inter
ON) Interrup
5
tion
rite Pointer
EXT
]
ly in case of
ly in case of
ly in case of
the correct
bit of Sn_IR
s time, if IM
MEOUT) Inte
0x402A
0x08
SEND
MR(n) is ‘1’, t
R is set as ‘1
pt Mask
r Register)[R
es (0x402A, 0
ster)[R/W][0
f ‘SOCKET = 0
f ‘SOCKET = 0
f ‘SOCKET = 0
errupt Mask
D_OK
rrupt Mask
_RX_WR,
th so as to
n_IR. If inte
4
ghts reserve
4
upt Mask
upt Mask
pt Mask
pt Mask
rupt Mask
ation to wr
value.
(0x402B, 0x
TIME
R/W][(0xFE4
0x402C+0x0
x412B, 0x422
0x412A, 0x42
ed.
EOUT
the interrupt
0’ & ‘S0_MR(
0’ & ‘S0_MR(
0’ & ‘S0_MR(
rrupt occurs
3
ite the rece
notify to th
’. When the
0x402B
0x00
RE
ECV
eive data. W
22A, 0x432A,
2B, 0x432B,
t is issued to
(P3:P0) = S0_
(P3:P0) = S0_
(P3:P0) = S0_
e host. Inte
2
2
n00][0xFF]
02A + 0xn00
in any SOCK
bits of Sn_I
DISC
errupt mask
When readin
o the host. (
KET and the
IMR and Sn_
_MR_PPPoE’
_MR_PPPoE’
_MR_PPPoE’
0) –
, 0x442A, 0x
1
CON
0x442B, 0x
CO
x452A,
x452B,
ON
‘nINT’
0
IR are
g this
bit of
bit is
39