W5200 WIZnet, W5200 Datasheet - Page 22

• Manufacturer Part Number: W5200
• Description: Ethernet ICs 3-IN-1 ENET CONTR TCP/IP+MAC+PHY
• Manufacturer: WIZnet
• Type: Embedded Systems using SPIr

Specifications of W5200

• Rohs: yes
• Product: Ethernet Controllers
• Data Rate: 10 Mb/s, 100 Mb/s
• Supply Voltage - Max: 3.63 V
• Supply Voltage - Min: 2.97 V
• Maximum Operating Temperature: + 85 C
• Package / Case: QFN-48
• Ethernet Connection Type: 10Base-T, 100Base-TX, PPPoE
• Maximum Power Dissipation: 528 mW
• Maximum Supply Current: 5 uA
• Minimum Operating Temperature: - 55 C
• Standard Supported: 802.3

PHYS
IMR2
The I
a bit
issued
interr
PHYS
© Co
Bit
7
6
5
4
3
2
1
0
S7_
Bit
7
6
5
4
3
2
1
0
STATUS(W52
_INT
t
opyright 201
STATUS is th
d whenever
rupt will not
7
7
(Interrupt M
nterrupt Mas
in the Inter
Symbol
S7_INT
S6_INT
S5_INT
S4_INT
S3_INT
S2_INT
S1_INT
S0_INT
POW
S6_
Res
Res
Res
Res
Res
Res
Sy
200 PHY stat
Mask Registe
he Register t
_INT
11WIZnet Co
ymbol
t occur thoug
l
L
LINK
rrupt Registe
served
served
served
served
served
served
6
6
ERDOWN
sk Register i
the corresp
Descri
IR(S7_
IR(S6_
IR(S5_
IR(S4_
IR(S3_
IR(S2_
IR(S1_
IR(S0_
S5_
er2)[R/W][0x
ponding bit i
tus Register)
_INT
to indicate W
er2 (IR2). If
gh the bit.
o., Inc. All rig
5
INT) Interrup
INT) Interrup
INT) Interrup
INT) Interrup
INT) Interrup
INT) Interrup
INT) Interrup
INT) Interrup
s used to ma
ption
Reserved
Reserved
Link Stat
This regis
0 : Link d
1 : Link U
Reserved
Power do
This regis
0 : Disab
1 : Enabl
Reserved
Reserved
Reserved
S4_
d
d
d
d
d
d
_INT
down
Up
le Power dow
tus Register
x0016][0x00
ask interrupt
pt Mask
pt Mask
pt Mask
pt Mask
pt Mask
pt Mask
pt Mask
pt Mask
)[R/W][0x17
own mode o
W5200 statu
ster indicate
ster indicate
4
ghts reserve
le Power dow
n the IR2 is
4
an interrup
S3_
7]
of PHY[Read
wn mode
es Link statu
es status of P
_INT
ed.
us of PHY.
ts. Each inte
wn mode(op
0]
[Read Only]
3
t mask bit i
set. If any
Descripti
S2_
errupt mask b
]
_INT
Power down
ion
bit in the IM
2
s.
erates norm
2
s set, an int
Only]
S1_
MR is set as
_INT
bit correspo
terruption w
1
al mode)
mode
S0_
will be
_INT
nds to
‘0’ an
0
22