MAX5715AAUD+ Maxim Integrated, MAX5715AAUD+ Datasheet - Page 7

• Manufacturer Part Number: MAX5715AAUD+
• Description: Digital to Analog Converters - DAC 12Bit 4CH V Buff Precision ADC
• Manufacturer: Maxim Integrated

Specifications of MAX5715AAUD+

• Rohs: yes
• Number Of Converters: 4
• Number Of Dac Outputs: 4
• Resolution: 12 bit
• Interface Type: SPI, Serial (3-Wire, Microwire)
• Settling Time: 4.5 us
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Package / Case: TSSOP-14
• Maximum Power Dissipation: 797 mW
• Minimum Operating Temperature: - 40 C
• Output Type: Voltage Buffered
• Supply Current: 1.16 mA
• Supply Voltage - Max: 5.5 V
• Supply Voltage - Min: 2.7 V

ELECTRICAL CHARACTERISTICS (continued)
(V
values are at T
Note 3:
Note 4:
Note 5:
Note 6:
Note 7:
Note 8:
Note 9:
Note 10: Guaranteed by design.
Note 11: All channels active at V
Note 12: Daisy-chain speed is relaxed to accommodate (t
Note 13: This specification and its propagation through the chain limits how quickly an aborted daisy-chain command can be fol-
Figure 1. SPI Serial Interface Timing Diagram
Maxim Integrated
Output DACs with Internal Reference and SPI Interface
SCLK Fall to RDY Fall
SCLK Fall to RDY Hold
CSB Rise to RDY Rise
DD
LDAC
SCLK
= 2.7V to 5.5V, V
CSB
CLR
DIN
t
CLPW
Electrical specifications are production tested at T
are guaranteed by design and characterization. Typical specifications are at T
DC Performance is tested without load.
Linearity is tested with unloaded outputs to within 20mV of GND and V
Offset and gain errors are calculated from measurements made with V
code 8 and 1016 for MAX5714, and code 2 and 254 for MAX5713.
Subject to zero and full-scale error limits and V
Measured with all other DAC outputs at midscale with one channel transitioning 0 to full scale.
On power-up, the device initiates an internal 200µs (typ) calibration sequence. All commands issued during this time will
be ignored.
lowed by another daisy-chain command, to be applied on a per-device basis.
PARAMETER
t
A
CSPW
Ultra-Small, Quad-Channel, 8-/10-/12-Bit Buffered
= +25NC.) (Note 3)
t
CSH0
DDIO
t
CSC
= 1.8V to 5.5V, V
1
D
IN
23
t
CSS0
FS
D
2
IN
, unloaded. Static logic inputs with V
t
DS
SYMBOL
22
t
t
t
CRH
CRF
CSR
D
3
IN
21
GND
t
DH
D
4
t
IN
CH
A
C
A
C
C
= 0V, C
20
pplies to 24th SCLK falling edge,
pplies to 24th SCLK falling edge,
LOAD
LOAD
LOAD
D
5
IN
19
MAX5713/MAX5714/MAX5715
L
= 20pF
= 0pF
= 20pF (Note 13)
REF
= 200pF, R
CRF
t
SCLK
D
6
A
IN
t
CL
settings.
18
= +25°C. Specifications over the entire operating temperature range
+ t
CONDITIONS
D
7
CSS0
IN
17
L
= 2kI, T
) with margin (derived specification, not production tested).
IL
D
8
IN
16
= V
GND
A
DD
REF
= -40NC to +125NC, unless otherwise noted. Typical
and V
.
22
= V
D
IN
2
DD
A
IH
= +25°C and are not guaranteed.
23
t
CSA
D
= V
at code 30 and 4065 for MAX5715,
IN
1
DDIO
MIN
t
LDH
24
2
D
IN
.
0
t
CSH1
TYP
t
LDPW
MAx
40
40
t
CSF
D
1
UNITS
IN
23
ns
ns
ns
7