MAX5715AAUD+ Maxim Integrated, MAX5715AAUD+ Datasheet - Page 23

• Manufacturer Part Number: MAX5715AAUD+
• Description: Digital to Analog Converters - DAC 12Bit 4CH V Buff Precision ADC
• Manufacturer: Maxim Integrated

Specifications of MAX5715AAUD+

• Rohs: yes
• Number Of Converters: 4
• Number Of Dac Outputs: 4
• Resolution: 12 bit
• Interface Type: SPI, Serial (3-Wire, Microwire)
• Settling Time: 4.5 us
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Package / Case: TSSOP-14
• Maximum Power Dissipation: 797 mW
• Minimum Operating Temperature: - 40 C
• Output Type: Voltage Buffered
• Supply Current: 1.16 mA
• Supply Voltage - Max: 5.5 V
• Supply Voltage - Min: 2.7 V

When power is applied to V
put is set to zero scale. To optimize DAC linearity, wait
until the supplies have settled and the internal setup and
calibration sequence completes (200Fs, typ).
Bypass V
itors to a low-impedance ground as close as possible to
the device. Minimize lead lengths to reduce lead induc-
tance. Connect the GND to the analog ground plane.
Digital and AC transient signals on GND can create noise
at the output. Connect GND to form the star ground for
the DAC system. Refer remote DAC loads to this system
ground for the best possible performance. Use proper
grounding techniques, such as a multilayer board with a
low-inductance ground plane, or star connect all ground
return paths back to the MAX5713/MAX5714/MAX5715
GND. Carefully layout the traces between channels to
reduce AC cross-coupling. Do not use wire-wrapped
boards and sockets. Use shielding to minimize noise immu-
nity. Do not run analog and digital signals parallel to one
another, especially clock signals. Avoid routing digital lines
underneath the MAX5713/MAX5714/MAX5715 package.
INL is the deviation of the measured transfer function
from a straight line drawn between two codes once offset
and gain errors have been nullified.
DNL is the difference between an actual step height and
the ideal value of 1 LSB. If the magnitude of the DNL P
1 LSB, the DAC guarantees no missing codes and is
monotonic. If the magnitude of the DNL R 1 LSB, the DAC
output may still be monotonic.
Offset error indicates how well the actual transfer function
matches the ideal transfer function. The offset error is
calculated from two measurements near zero code and
near maximum code.
Maxim Integrated
Output DACs with Internal Reference and SPI Interface
DD
and V
Ultra-Small, Quad-Channel, 8-/10-/12-Bit Buffered
Applications Information
Differential Nonlinearity (DNL)
DDIO
Integral Nonlinearity (INL)
Bypassing Considerations
with high-quality ceramic capac-
DD
Layout Considerations
Power-On Reset (POR)
and V
Power Supplies and
DDIO
Definitions
Offset Error
, the DAC out-
MAX5713/MAX5714/MAX5715
Gain error is the difference between the ideal and the
actual full-scale output voltage on the transfer curve,
after nullifying the offset error. This error alters the slope
of the transfer function and corresponds to the same
percentage error in each step.
Zero-scale error is the difference between the DAC
output voltage when set to code zero and ground. This
includes offset and other die level nonidealities.
Full-scale error is the difference between the DAC output
voltage when set to full scale and the reference volt-
age. This includes offset, gain error, and other die level
nonidealities.
The settling time is the amount of time required from the
start of a transition, until the DAC output settles to the new
output value within the converter’s specified accuracy.
Digital feedthrough is the amount of noise that appears
on the DAC output when the DAC digital control lines are
toggled.
A major carry transition occurs at the midscale point
where the MSB changes from low to high and all other
bits change from high to low, or where the MSB changes
from high to low and all other bits change from low to
high. The duration of the magnitude of the switching
glitch during a major carry transition is referred to as the
digital-to-analog glitch impulse.
The digital-to-analog power-up glitch is the duration of
the magnitude of the switching glitch that occurs as the
device exits power-down mode.
Digital-to-Analog Glitch Impulse
Digital Feedthrough
Zero-Scale Error
Full-Scale Error
Settling Time
Gain Error
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