LPC1111FHN33/102'5 NXP Semiconductors, LPC1111FHN33/102'5 Datasheet - Page 508

no-image

LPC1111FHN33/102'5

Manufacturer Part Number
LPC1111FHN33/102'5
Description
ARM Microcontrollers - MCU CORTEX-M0 8 KB FL 4 KB SRAM
Manufacturer
NXP Semiconductors
Datasheet

Specifications of LPC1111FHN33/102'5

Rohs
yes
Core
ARM Cortex M0
Processor Series
LPC1111
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
On-chip Adc
Yes
Operating Supply Voltage
1.8 V to 3.6 V
Operating Temperature Range
- 65 C to + 150 C
Mounting Style
SMD/SMT
Interface Type
I2C, SPI, UART
Number Of Programmable I/os
42
Number Of Timers
4
Program Memory Type
Flash
Factory Pack Quantity
4000

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LPC1111FHN33/102'5LPC1111FHN33/102
Manufacturer:
NXP
Quantity:
5 000
Company:
Part Number:
LPC1111FHN33/102'5LPC1111FHN33/102
Manufacturer:
NXP/恩智浦
Quantity:
20 000
Company:
Part Number:
LPC1111FHN33/102'5LPC1111FHN33/102
0
NXP Semiconductors
UM10398
User manual
28.6.4.2.1 Calculating the RELOAD value
28.6.4.1 SysTick Control and Status Register
28.6.4.2 SysTick Reload Value Register
28.6.4.3 SysTick Current Value Register
The SYST_CSR enables the SysTick features. See the register summary in for its
attributes. The bit assignments are:
Table 458. SYST_CSR bit assignments
The SYST_RVR specifies the start value to load into the SYST_CVR. See the register
summary in
Table 459. SYST_RVR bit assignments
The RELOAD value can be any value in the range 0x00000001-0x00FFFFFF. You can program
a value of 0, but this has no effect because the SysTick exception request and
COUNTFLAG are activated when counting from 1 to 0.
To generate a multi-shot timer with a period of N processor clock cycles, use a RELOAD
value of N-1. For example, if the SysTick interrupt is required every 100 clock pulses, set
RELOAD to 99.
The SYST_CVR contains the current value of the SysTick counter. See the register
summary in
Bits
[31:17]
[16]
[15:3]
[2]
[1]
[0]
Bits
[31:24]
[23:0]
Name
-
COUNTFLAG
-
CLKSOURCE
TICKINT
ENABLE
Table 28–457
Table 28–457
-
Name
RELOAD
Chapter 28: LPC111x/LPC11Cxx Appendix: ARM Cortex-M0 reference
All information provided in this document is subject to legal disclaimers.
Rev. 12 — 24 September 2012
Function
Reserved.
Value to load into the SYST_CVR when the counter is enabled and
when it reaches 0, see
for its attributes. The bit assignments are:
for its attributes. The bit assignments are:
Function
Reserved.
Returns 1 if timer counted to 0 since the last read of this register.
Reserved.
Selects the SysTick timer clock source:
0 = external reference clock.
1 = processor clock.
Enables SysTick exception request:
0 = counting down to zero does not assert the SysTick exception
request.
1 = counting down to zero asserts the SysTick exception request.
Enables the counter:
0 = counter disabled.
1 = counter enabled.
Section
28.6.4.2.1.
UM10398
© NXP B.V. 2012. All rights reserved.
508 of 538

Related parts for LPC1111FHN33/102'5